BQ26501_16 Datasheet, PDF (13/33 Pages) Texas Instruments – HANDHELD APPLICATIONS

Not Recommended For New Designs
bq26501
ą
SLUS586B − OCTOBER 2003 − REVISED MARCH 2004
APPLICATION INFORMATION
Status Flag Register (FLAGS) − Address 0x0A
BIT 7
BIT 6
BIT 5
NAME
CHGS NOACT
IMIN
POR STATUS
0
0
0
BIT 4
CI
1
BIT 3
RSVD
0
BIT 2
VDQ
0
BIT 1
EDV1
0
BIT 0
EDVF
0
MODE
REGISTER
DESCRIPTION
CHGS
Charge-state flag. A “1” in the CHGS indicates a charge current (VSRP > VSRN). A “0” indicates a lack of charge
activity. This bit should be read when the host system reads the average current register pair to determine the
sign of the average current magnitude. This bit is cleared to “0” on all resets.
NOACT
No-activity flag. A “1” indicates that the voltage across RS is less than the digital magnitude filter. See the Digital
Magnitude Filter section for more information. This bit is cleared to ”0” on all resets.
IMIN
Li-ion taper current detection flag. A “1” indicates that the charge current has tapered to less than the taper value
set in EEPROM and that the battery voltage is greater than or equal to the value selected by the QV0 and QV1
bits in the PKCFG register (see EEPROM Data Registers description for more details). This bit is cleared to “0” on
all resets.
Capacity Inaccurate flag. A ”1” indicates that the firmware has not been through a valid learning cycle and is bas-
CI
ing all calculations on design values programmed into EEPROM. This bit will be set on a full reset and will only be
cleared on a LMD update following a learning cycle.
RSVD
VDQ
Reserved bit.
Valid-discharge flag. A “1” indicates that the bq26501 has met all necessary requirements for a capacity learning
discharge cycle. This bit clears to “0” on a LMD update or condition that disqualifies a learning cycle. This bit is
cleared to “0” on all resets.
EDV1
EDVF
End-of-discharge-voltage-1 flag. A “1” indicates that voltage on the BAT pin is less than or equal to the EDV1
voltage programmed in EEPROM and the battery has less than or equal to 6.25% of LMD capacity remaining.
LMD updates immediately if the VDQ bit is set when this bit transitions from 0 to 1. This bit is cleared to ”0” on all
resets or when charging.
End-of-discharge-voltage-final flag. A “1” indicates that the battery has discharged fully based on design capacity
programmed in EEPROM. Used to define the empty capacity threshold. This bit is cleared to ”0” on all resets or
when charging.
The host system has read-only access to this register.
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