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MSP430F533_15 Datasheet, PDF (60/112 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430F5338, MSP430F5336, MSP430F5335, MSP430F5333
SLAS721D – AUGUST 2010 – REVISED DECEMBER 2015
www.ti.com
6.12.8 System Module (SYS) (Link to User's Guide)
The SYS module handles many of the system functions within the device. These include power-on reset
and power-up clear handling, NMI source selection and management, reset interrupt vector generators,
bootloader entry mechanisms, and configuration management (device descriptors). SYS also includes a
data exchange mechanism through JTAG called a JTAG mailbox that can be used in the application.
Table 6-10 lists the SYS interrupt vector registers.
Table 6-10. System Module Interrupt Vector Registers
INTERRUPT VECTOR
REGISTER
SYSRSTIV, System Reset
SYSSNIV, System NMI
SYSUNIV, User NMI
INTERRUPT EVENT
No interrupt pending
Brownout (BOR)
RST/NMI (BOR)
PMMSWBOR (BOR)
LPM3.5 or LPM4.5 wakeup (BOR)
Security violation (BOR)
SVSL (POR)
SVSH (POR)
SVML_OVP (POR)
SVMH_OVP (POR)
PMMSWPOR (POR)
WDT time-out (PUC)
WDT key violation (PUC)
KEYV flash key violation (PUC)
Reserved
Peripheral area fetch (PUC)
PMM key violation (PUC)
Reserved
No interrupt pending
SVMLIFG
SVMHIFG
DLYLIFG
DLYHIFG
VMAIFG
JMBINIFG
JMBOUTIFG
SVMLVLRIFG
SVMHVLRIFG
Reserved
No interrupt pending
NMIIFG
OFIFG
ACCVIFG
Reserved
WORD ADDRESS
019Eh
019Ch
019Ah
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
22h to 3Eh
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h to 1Eh
00h
02h
04h
06h
08h to 1Eh
PRIORITY
Highest
Lowest
Highest
Lowest
Highest
Lowest
60
Detailed Description
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