MSP430F533_15 Datasheet, PDF (35/112 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430F5338, MSP430F5336, MSP430F5335, MSP430F5333
SLAS721D – AUGUST 2010 – REVISED DECEMBER 2015
5.33 USCI (I²C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5-15)
f_USCI
PARAMETER
USCI input clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK
External: UCLK
Duty cycle = 50% ±10%
V_CC
MIN MAX UNIT
f_SYSTEM MHz
f_SCL
t_HD,STA
t_SU,STA
t_HD,DAT
t_SU,DAT
t_SU,STO
t_SP
SCL clock frequency
Hold time (repeated) START
Setup time for a repeated START
Data hold time
Data setup time
Setup time for STOP
Pulse duration of spikes suppressed by
input filter
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
f_SCL ≤ 100 kHz
f_SCL > 100 kHz
2.2 V, 3 V
2.2 V, 3 V
2.2 V, 3 V
2.2 V, 3 V
2.2 V, 3 V
2.2 V, 3 V
2.2 V
3V
0
400 kHz
4.0
µs
0.6
4.7
µs
0.6
0
ns
250
ns
4.0
µs
0.6
50
600
ns
50
600
SDA
t_HD,STA
t_SU,STA
t_HD,STA
t_BUF
t_LOW
t_HIGH
t_SP
SCL
t_HD,DAT
t_SU,DAT
Figure 5-15. I²C Mode Timing
t_SU,STO
Copyright © 2010–2015, Texas Instruments Incorporated
Specifications
35
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