English
Language : 

AM1808_11 Datasheet, PDF (60/265 Pages) Texas Instruments – AM1808 ARM Microprocessor
AM1808
SPRS653B – FEBRUARY 2010 – REVISED APRIL 2011
www.ti.com
Table 2-33. Unused DDR2/mDDR Controller Signal Configuration
SIGNAL NAME
Configuration (1)
DDR_D[15:0]
No Connect
DDR_A[13:0]
No Connect
DDR_CLKP
No Connect
DDR_CLKN
No Connect
DDR_CKE
No Connect
DDR_WE
No Connect
DDR_RAS
No Connect
DDR_CAS
No Connect
DDS_CS
No Connect
DDR_DQM[1:0]
No Connect
DDR_DQS[1:0]
No Connect
DDR_BA[2:0]
No Connect
DDR_DQGATE0
No Connect
DDR_DQGATE1
No Connect
DDR_ZP
No Connect
DDR_VREF
No Connect
DDR_DVDD18
No Connect
(1) To minimize power consumption, the DDR2/mDDR controller input receivers should be placed in power-down mode by setting
VTPIO[14]=1.
60
Device Overview
Submit Documentation Feedback
Product Folder Link(s): AM1808
Copyright © 2010–2011, Texas Instruments Incorporated