AM1808_11 Datasheet, PDF (256/265 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
SPRS653B – FEBRUARY 2010 – REVISED APRIL 2011
BIT
31:28
27:12
11-1
0
Table 5-147. JTAG ID Register Selection Bit Descriptions
NAME
VARIANT
PART NUMBER
MANUFACTURER
LSB
Variant (4-Bit) value
Part Number (16-Bit) value
Manufacturer (11-Bit) value
LSB. This bit is read as a "1".
DESCRIPTION
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5.34.4.2 JTAG Test-Port Electrical Data/Timing
Table 5-148. Timing Requirements for JTAG Test Port (see Figure 5-89)
No.
PARAMETER
1 t_c(TCK)
Cycle time, TCK
2 t_w(TCKH)
Pulse duration, TCK high
3 t_w(TCKL)
Pulse duration, TCK low
4 t_c(RTCK)
Cycle time, RTCK
5 t_w(RTCKH)
Pulse duration, RTCK high
6 t_w(RTCKL)
Pulse duration, RTCK low
7 t_{su(TDIV-RTCKH)} Setup time, TDI/TMS/TRST valid before RTCK high
8 t_{h(RTCKH-TDIV)} Hold time, TDI/TMS/TRST valid after RTCK high
1.3V, 1.2V
MIN MAX
40
16
16
40
16
16
4
4
1.1V
MIN MAX
50
20
20
50
20
20
4
6
1.0V
MIN MAX
66.6
26.6
26.6
66.6
26.6
26.6
4
8
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
Table 5-149. Switching Characteristics Over Recommended Operating Conditions for JTAG Test Port
(see Figure 5-89)
No.
PARAMETER
9 t_{d(RTCKL-TDOV)} Delay time, RTCK low to TDO valid
1.3V, 1.2V
MIN MAX
18
1.1V
MIN MAX
23
1.0V
MIN MAX
31
UNIT
ns
TCK
RTCK
2
5
1
4
3
6
TDO
TDI/TMS/TRST
9
8
7
Figure 5-89. JTAG Test-Port Timing
5.34.5 JTAG 1149.1 Boundary Scan Considerations
To use boundary scan, the following sequence should be followed:
• Execute a valid reset sequence and exit reset
• Wait at least 6000 OSCIN clock cycles
• Enter boundary scan mode using the JTAG pins
No specific value is required on the EMU0 and EMU1 pins for boundary scan testing. If TRST is not driven
by the boundary scan tool or tester, TRST should be externally pulled high during boundary scan testing.
256 Peripheral Information and Electrical Specifications
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