MSP430F4796IPZ Datasheet, PDF (57/89 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F47x
MIXED SIGNAL MICROCONTROLLER
SLAS629A -- MARCH 2009 -- REVISED APRIL 2009
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
flash memory
PARAMETER
V_CC(PGM/
ERASE)
Program and erase supply voltage
TEST
CONDITIONS
V_CC
MIN TYP MAX UNIT
2.2
3.6 V
f_FTG
Flash timing generator frequency
257
476 kHz
I_PGM
Supply current from DV_CC during program
2.5 V/3.6 V
3
5 mA
I_ERASE
Supply current from DV_CC during erase
2.5 V/3.6 V
3
7 mA
t_CPT
Cumulative program time
See Note 1
2.5 V/3.6 V
10 ms
t_CMErase
t_Retention
Cumulative mass erase time
Program/erase endurance
Data retention duration
See Note 2
T_J = 25°C
2.5 V/3.6 V 200
10⁴ 10⁵
100
ms
cycles
years
t_Word
Word or byte program time
35
t_{Block, 0}
Block program time for 1^st byte or word
30
t_{Block, 1-63}
t_{Block, End}
Block program time for each additional byte or word
Block program end-sequence wait time
see Note 3
21
6
t_FTG
t_{Mass Erase}
Mass erase time
5297
t_{Seg Erase}
Segment erase time
4819
NOTES: 1. The cumulative program time must not be exceeded when writing to a 64--byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. The mass erase duration generated by the flash timing generator is at least 11.1ms ( = 5297x1/f_FTG, max = 5297x1/476kHz). To
achieve the required cumulative mass erase time the Flash Controller’s mass erase operation can be repeated until this time is met.
(A worst case minimum of 19 cycles are required).
3. These values are hardwired into the Flash Controller’s state machine (t_FTG = 1/f_FTG).
JTAG interface
PARAMETER
TEST
CONDITIONS
V_CC
f_TCK
TCK input frequency
See Note 1
2.2 V
3V
R_Internal
Internal pullup resistance on TMS, TCK, TDI/TCLK
See Note 2
2.2 V/ 3 V
NOTES: 1. f_TCK may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pullup resistors are implemented in all versions.
MIN TYP MAX UNIT
0
5 MHz
0
10 MHz
25
60
90 kΩ
JTAG fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
MIN MAX UNIT
V_CC(FB) Supply voltage during fuse-blow condition
T_A = 25°C
2.5
V
V_FB
Voltage level on TDI/TCLK for fuse-blow: F versions
6
7V
I_FB
Supply current into TDI/TCLK during fuse blow
100 mA
t_FB
Time to blow fuse
1 ms
NOTES: 1. Once the fuse is blown, no further access to the MSP430 JTAG/Test and emulation features is possible. The JTAG block is switched
to bypass mode.
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