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MSP430F4796IPZ Datasheet, PDF (50/89 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
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MSP430F47x
MIXED SIGNAL MICROCONTROLLER
SLAS629A -- MARCH 2009 -- REVISED APRIL 2009
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
12-bit DAC, reference input specifications
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
VREF
Reference input
voltage range
DAC12IR = 0 (see Notes 1 and 2)
DAC12IR = 1 (see Notes 3 and 4)
2.2 V/3 V
2.2 V/3 V
AVCC/3 AVCC+0.2
V
AVCC AVCC+0.2
Reference input
Ri(VREF)
resistance
DAC12IR = 0, SD16VMIDON = 1
(see Note 5)
DAC12IR = 1, SD16VMIDON = 1
2.2 V/3 V
2.2 V/3 V
20
40
48
MΩ
56 kΩ
NOTES: 1. For a full-scale output, the reference input voltage can be as high as 1/3 of the maximum output voltage swing (AVCC).
2. The maximum voltage applied at reference input voltage terminal VREF = [AVCC -- VE(O)] / [3*(1 + EG)].
3. For a full-scale output, the reference input voltage can be as high as the maximum output voltage swing (AVCC).
4. The maximum voltage applied at reference input voltage terminal VREF = [AVCC -- VE(O)] / (1 + EG).
5. Characterized, not production tested
12-bit DAC, dynamic specifications (VREF, DAC12 = AVCC, DAC12IR = 1) (see Figure 24 and Figure 25)
PARAMETER
DAC12
tON
on-time
TEST CONDITIONS
DAC12_xDAT = 800h,
ErrorV(O) < ±0.5 LSB
(see Note 1, Figure 24)
DAC12AMPx = 0 → {2, 3, 4}
DAC12AMPx = 0 → {5, 6}
DAC12AMPx = 0 → 7
VCC
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
MIN TYP MAX UNIT
60 120
15
30 µs
6 12
tS(FS)
Settling time, DAC12_xDAT =
full-scale
80h→ F7Fh→ 80h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
100 200
40
80 µs
15 30
tS(C-C)
Settling time,
code to code
DAC12_xDAT =
3F8h→ 408h→ 3F8h
BF8h→ C08h→ BF8h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
5
2
µs
1
DAC12_xDAT =
SR
Slew rate
80h→ F7Fh→ 80h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
2.2 V/3 V 0.05 0.12
2.2 V/3 V 0.35
0.7
2.2 V/3 V
1.5
2.7
V/µs
DAC12_xDAT =
Glitch energy: full-scale 80h→ F7Fh→ 80h
DAC12AMPx = 2
DAC12AMPx = 3, 5
DAC12AMPx = 4, 6, 7
2.2 V/3 V
2.2 V/3 V
2.2 V/3 V
600
150
nV-s
30
NOTES: 1. RLoad and CLoad connected to AVSS (not AVCC/2) in Figure 24.
2. Slew rate applies to output voltage steps > = 200mV.
DAC Output
RLoad = 3 kΩ
ILoad
AV CC
2
CLoad = 100pF
RO/P(DAC12.x)
VOUT
Conversion 1
Glitch
Energy
Conversion 2
+/-- 1/2 LSB
Conversion 3
+/-- 1/2 LSB
tsettleLH
Figure 24. Settling Time and Glitch Energy Testing
tsettleHL
50
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