LP3913 Datasheet, PDF (56/70 Pages) Texas Instruments – Power Management IC for Flash Memory-Based Portable Media Players

LP3913
SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013
www.ti.com
BUCK3 Control Register
Buck3 is controlled through its dedicated control register. Buck3 is enabled through the power-on sequencing.
The system processor is required to select the desired Buck3 output voltage through bits D4-0 before enabling it
by setting bit D6 in the control register. Buck3 is also disabled when 5'b00000 is programmed in the register field
D4-0, regardless of the state of the bit D6. When Buck3 is disabled, its output is internally tied low through a
1MΩ resistor. If D4-0 is set to 5'b00000, the 1MΩ resistor is disconnected.
The default output voltage for the buck can be set to 1.8V, 2.5V, 2.8V, 3.3V, and is factory programmable.
BUCK3 Control Register (07)H
Access
Data
Reset
D7
Read Only 0
Reserved
D6
D5
R/W
Force PWM
0: Automatic
modulation mode
1: Force PWM
modulation
Operation
0: disable
1: enable
n/a
0
1
D4–0
5’h1F
BUCK3 Output Voltage (V)
5’h00
disabled
5’h01
1.80
5’h02
1.85
5’h03
1.90
5’h04
1.95
5’h05
2.00
5’h06
2.05
5’h07
2.10
5’h08
2.15
5’h09
2.20
5’h0A
2.25
5’h0B
2.30
5’h0C
2.35
5’h0D
2.40
5’h0E
2.45
5’h0F
2.50
5’h10
2.55
5’h11
2.60
5’h12
2.65
5’h13
2.70
5’h14
2.75
5’h15
2.80
5’h16
2.85
5’h17
2.90
5’h18
2.95
5’h19
3.00
5’h1A
3.05
5’h1B
3.10
5’h1C
3.15
5’h1D
3.20
5’h1E
3.25
5’h1F
3.30
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