LP3913 Datasheet, PDF (31/70 Pages) Texas Instruments – Power Management IC for Flash Memory-Based Portable Media Players

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LP3913
SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013
Figure 56. Power Up Sequence
t0 t1 t2 t3 t4
t5
CHG_DET/USBPWR
or
ONOFF
32 ms
deglitch
External
Events
ONSTAT
(To Microprocessor)
32 ms
VLDO1, VLDO2
deglitch
(If LDO2ENB is logic 1 during NRST Low,
otherwise LDO2 are register or pin enabled)
VBUCK1
VBUCK2
15 ms
20 ms
VBUCK3
NRST
POWERACK
(From Microprocessor)
(Bit D4 in PON register or
POWERBACK pin)
VREFH
25 ms
60 ms
5 ms
128 ms
POWERACK deadline
Transitioning From Active Mode To Standby Mode
External Event Triggers the Transition from Active to Standby Mode
When the device is active, a subsequent re-assertion of the push button will turn off the LP3913 indirectly by first
flagging the system processor though the ONSTAT pin. Upon detecting the ONSTAT transition, the system
processor must clear bit D4 (PACK) in the Power On Event Register and apply a logic low to the POWERACK
pin to power down the LP3913, which then transitions to Standby Mode. Clearing the PACK register bit and
POWERACK pin while external supply sources are present (either USB or CHG_IN) will not power down the
LP3913, to keep the charger active. The system can as always disable all necessary DC/DC converters, except
BUCK1, through the register control.
When external power is disconnected, LP3913 will remain in its Active state unless the battery voltage is below
V_BLA (Battery Low Alarm) or unless the PACK (either bit D4 in the PON register and the POWERACK pin) is
cleared by the system processor.
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