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LP3913 Datasheet, PDF (4/70 Pages) Texas Instruments – Power Management IC for Flash Memory-Based Portable Media Players
LP3913
SNVS489I – NOVEMBER 2006 – REVISED SEPTEMBER 2013
www.ti.com
Pin #
Name
I/O
14 NRST
O
15 CHG
O
16 STAT
O
17 BUCK1EN
I
18 VFB1
I
19 BCKGND1
G
20 VBUCK1
O
21 VIN2
I
22 VIN3
I
23 VBUCK2
O
24 BCKGND2
G
25 VFB2
I
26 ONOFF
I
27 I2C_SCL
I
28 VDDIO
I
29 I2C_SDA
I/O
30 ONSTAT
O
31 VFB3
I
32 VBUCK3
O
33 VBUCK3L2
I
34 BCK3GND1
G
35 VBUCK3L1
I
36 VIN4
I
37 USBSUSP
I
38 USBISEL
I
39 BUCK3GND2
G
40 DGND
G
41 VDD3
I
42 VDD2
I
43 VBATT3
O
44 VBATT2
O
45 USBPWR
I
46 VDD1
I
47 CHG_DET
I
48 IREF
I
Type
Open
Drain
D
D
D
A
G
A
PWR
PWR
A
G
A
D
D
D
D
Open
Drain
A
A
A
G
A
PWR
D
D
G
G
PWR
PWR
A
A
PWR
PWR
A
A
Functional Description
Open drain active low reset during Standby
This output indicates that a valid charger supply source (USB adapter) has been detected,
and the IC is charging. (Red LED)
Battery Status output indicator - Off during CC, 50% duty cycle during CV, 100% duty
cycle with a fully charged Li-ion battery (Green LED)
Digital input to enable/disable BUCK1
Buck1 Feedback input terminal
Buck1 Ground
Buck1 Output
Power input to BUCK1. VIN2 pin must be externally shorted to the VDD pins.
Power input to BUCK2. VIN3 pin must be externally shorted to the VDD pins.
Buck2 Output
Buck2 Ground
Buck2 Feedback input terminal
Power ON/OFF pin configured either as level (High or Low) triggered or edge (High or
Low) triggered.
I2C-compatible interface clock terminal
Supply to input / output stages of digital I/O
I2C-compatible interface data terminal
Open Drain output that reflects the debounced state of ONOFF pin.
Buck3 Feedback input terminal
Buck3Output voltage
Buck3 inductor
Buck3t high current ground
Buck3 inductor
Power input to Buck3. VIN4 pin must be externally shorted to the VDD pins.
This pin needs to be pulled high during USB suspend mode.
Pulling this pin low limits the USB charge current to 100 mA. Pulling this pin high limits the
USB charge current to 500 mA.
Buck3 Core Ground
Digital ground
Power input to supply application. This pin must be externally shorted to VDD1 and
VDD2.
Power input to supply application This pin must be externally shorted to VDD1 and VDD3.
Positive battery terminal. This pin must be externally shorted to V\BATT1 and VBATT2.
Positive battery terminal. This pin must be externally shorted to VBATT1 and VBATT3.
USB power input pin
Power input to supply application This pin is shorted to VDD2 and VDD3.
Wall adapter power input pin
A 121 kΩ resistor must be connected between this pin and AGND. The resistor value
determines the reference current for the internal bias generator.
A: Analog Pin D: Digital Pin G: Ground Pin PWR: Power Pin
I: Input Pin I/O: Input/Output Pin
O: Output Pin
4
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