AFE7222 Datasheet, PDF (51/106 Pages) Texas Instruments – Analog Front End Wideband Mixed-Signal Transceiver

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AFE7222
AFE7225
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
5.8 LVDS RX OUTPUT INTERFACE REGISTERS
Register Name – CONFIG128 – Address 0x337, Default = 0x00
<7>
<6>
<5>
<4>
OVR_EN_RX
<3>
WORDWISE_ RX
<2>
<1>
<0>
PATTERN_SEL_RX<2:0>
All the modes of register 0x337 work only if MASTER_OVERRIDE_RX (Bit <7> in Address 0x33A) is
enabled.
OVR_EN_RX: Overrange indicator enable bit. When 0 – Overrange is not sent along with data. If 1 – D0
is replaced by Overrange indicator bit.
WORDWISE_RX: When selected, wordwise mode is enabled.
PATTERN_SEL_RX<2:0>: To select the output pattern from the serializer
PATTERN_SEL<2:0>
OUTPUT PATTERN
000
Normal ADC pattern
001
All Zeros
010
All ones
011
alternate between 1 and 0
(D11..D0 alternates between 010101010101 and 101010101010)
100
Data ramp pattern
(D11..D0 ramps continuously every 4 clock cycles in steps of 1 LSB)
101
Output custom pattern
110
Deskew pattern – D11..D0 replaced by 010101010101
111
Sync pattern – D11..D0 replaced by 111111000000 in 1-wire mode and
by 111000111000 in 2-wire mode
Register Name – CONFIG129 – Address 0x338, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CUSTOM PATTERN <15:8>
Register Name – CONFIG130 – Address 0x339, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CUSTOM PATTERN <7:0>
Register Name – CONFIG131 – Address 0x33A, Default = 0x00
<7>
<6>
<5>
<4>
MASTER_OVERRIDE_RX SERIALIZATION_RX<1:0>
DFS_RX
<3>
MSB_FIRST_RX
<2>
<1>
<0>
TWOWIRE_RX SDR_RX
All the modes of register 0x33A work only if MASTER_OVERRIDE_RX (Bit <7> in Address 0x33A) is
enabled.
MASTER_OVERRIDE_RX: Master override bit for RX interface registers. This bit needs to be set to 1
whenever the RX interface mode is chosen to be LVDS interface.
SERIALIZATION_RX<1:0>: Sets the serialization factor.
SERIALIZATION_RX<1:0>
00
01
10
SERIALIZATION
12
14
16
In two wire mode for 14x serialization the frame clock is 0.5X, where as 12X and 16X frame clock is still
1X.
DFS_RX: Sets the output data format.
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REGISTER DESCRIPTIONS
51