AFE7222 Datasheet, PDF (25/106 Pages) Texas Instruments – Analog Front End Wideband Mixed-Signal Transceiver

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AFE7222
AFE7225
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
TX_CMIX_SYNC_SRC – Specifies the sync source for TX CMIX. When cleared, SYNC pin is used as the
sync source. When set, a rising edge on serial interface bit TX_CMIX_SER_IF_SYNC in Register 0x10D
is used as the sync source for TX CMIX. This is applicable when TX_GLOBAL_SYNC_DIS is set and
TX_CMIX_SYNC_DIS is cleared.
VALUE
0
1
SYNC SOURCE
Pin
Serial interface bit
Register Name – CONFIG7 – Address 0x10C, Default = 0x00
<7> <6>
<5>
<4>
TX_GLOBAL_
SYNC_SRC
TX_QMC_GAIN_PH_
SYNC_SRC
<3>
<2>
<1>
TX_QMC_OFF_SYNC_ TX_DIV_SYNC_
SRC
SRC
<0>
TX_FIFO_SYNC_
SRC
TX_FIFO_SYNC_SRC – Specifies the Sync source for TX FIFO. It is applicable when
TX_GLOBAL_SYNC_DIS is set and TX_FIFO_SYNC_DIS is cleared.
VALUE
0
1
SYNC SOURCE
Pin
Serial interface bit
When the value programmed is 1, a rising edge on the serial interface bit TX_FIFO_SER_IF_SYNC in
register 0x10D is used as the sync source for the FIFO.
TX_DIV_SYNC_SRC – Specifies the sync source for TX Divider. When cleared, SYNC pin is used as the
sync source. When set, a rising edge on serial interface bit TX_DIV_SER_IF_SYNC in register 0x10D is
used as the sync source for TX Divider. This is applicable when TX_GLOBAL_SYNC_DIS is set and
TX_DIV_SYNC_DIS is cleared.
TX_QMC_OFF_SYNC_SRC – Specifies the sync source for TX QMC Offset Correction. When cleared,
SYNC pin is used as the sync source. When set, a rising edge on serial interface bit
TX_QMC_OFF_SER_IF_SYNC in register 0x10D is used as the sync source for TX QMC Offset
Correction. This is applicable when TX_GLOBAL_SYNC_DIS is set and TX_QMC_OFF_SYNC_DIS is
cleared.
TX_QMC_GAIN_PH_SYNC_SRC – Specifies the sync source for TX QMC Gain Phase Correction. When
cleared, SYNC pin is used as the sync source. When set, a rising edge on serial interface bit
TX_QMC_GAIN_PH_SER_IF_SYNC in register 0x10D is used as the sync source for TX QMC Gain
Phase Correction. This is applicable when TX_GLOBAL_SYNC_DIS is set and
TX_QMC_GAIN_PH_SYNC_DIS is cleared.
TX_GLOBAL_SYNC_SRC – Specifies the sync source for TX. This is applicable when
TX_GLOBAL_SYNC_DIS is cleared.
VALUE
0
1
SYNC SOURCE
All blocks synced from the SYNC pin
All blocks synced using serial Interface bit
When serial interface is specified to be the sync source, a rising edge on the serial interface bit
TX_GLOB_SER_IF_SYNC in register 0x10D is used as the sync source.
Copyright © 2011–2012, Texas Instruments Incorporated
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REGISTER DESCRIPTIONS
25