THS6184_16 Datasheet, PDF (5/39 Pages) Texas Instruments – DUAL-PORT, LOW-POWER DIFFERENTIAL xDSL LINE DRIVER AMPLIFIERS

THS6184
www.ti.com ................................................................................................................................................. SLLS635D – AUGUST 2005 – REVISED JANUARY 2009
ELECTRICAL CHARACTERISTICS (continued)
At V_S = ±12 V: R_F = 3 kΩ, R_L = 50 Ω, G = 5, R_adj = 0 Ω, full bias (unless otherwise noted) each amplifier independently tested.
PARAMETER
CONDITIONS
TYP
25°C
25°C
OVER TEMPERATURE
0°C to –40°C to
70°C 85°C
UNITS
MIN/
MAX
+11
R_L = 100 Ω
–11
V
Typ
V
Typ
Output voltage swing
R_L = 50 Ω
10.8
10.4
10.3
10.3
V
Min
–10.8 –10.4 –10.3 –10.3
V
Max
R_L = 25 Ω
+10.4
+9.8
+9.7
+9.7
V
Min
–10.35 –9.7
–9.6
–9.6
V
Max
Output current (sourcing)
Output current (sinking)
Short circuit output Current
R_L = 25 Ω
R_L = 25 Ω
416
392
388
388
mA
Min
414
388
384
384
mA
Min
±850
mA
Typ
Output impedance
f = 1 MHz
0.2
Ω
Typ
Crosstalk
f = 1 MHz,
D1 to D2, D3 to D4
–40
V_O = 2 V_PP
D1 to D3, D2 to D4
–70
dB
Typ
dB
Typ
POWER SUPPLY
Maximum operating voltage
±16
±16
±16
V
Max
Minimum operating voltage
±4
±4
±4
V
Min
Per amplifier, Full (Bias-1=0, Bias-2 = 0)
4.3
4.9
5.1
5.2
Maximum Is+ quiescent current
Per amplifier, Mid (Bias-1=1, Bias-2 = 0)
Per amplifier, Low (Bias-1=0, Bias-2 = 1)
3.3
3.8
4.0
4.1
2.2
2.6
2.8
2.9
mA
Max
Per amplifier, Off (Bias-1=1, Bias-2 = 1)
0.2
0.3
0.4
0.4
Minimum Is+ quiescent current
Per amplifier, Full (Bias-1=0, Bias-2 = 0)
4.3
3.8
3.6
3.6
mA
Min
Per amplifier, Full (Bias-1=0, Bias-2 = 0)
4.1
4.7
4.9
5
Maximum ls- quiescent current
Per amplifier, Mid (Bias-1=1, Bias-2 = 0)
Per amplifier, Low (Bias-1=0, Bias-2 = 1)
3.1
3.6
3.8
3.9
2.1
2.4
2.6
2.7
mA
Max
Per amplifier, Off (Bias-1=1, Bias-2 = 1)
0.01
0.1
0.15
0.15
Minimum Is- quiescent current
Per amplifier, Full Bias
4.1
3.6
3.5
3.5
mA
Min
Current through GND pin
Per amplifier, Full (Bias-1 = 0, Bias-2 = 0)
0.2
mA
Typ
Power supply rejection (+PSRR)
Power supply rejection (-PSRR)
LOGIC CHARACTERISTICS
Bias control pin logic threshold
V_S+ = 13 V to 11 V, V_S– = –12 V
V_S+ = 12 V, V_S– = –13 V to –11 V
Logic 1, with respect to GND pin ⁽²⁾
Logic 0, with respect to GND pin ⁽²⁾
78
72
70
69
73
67
65
64
≥2.6
≤0.8
dB
Min
dB
Min
V
Typ
V
Typ
Bias pin quiescent current
Bias-X =0.5 V (Logic 0)
Bias-X = 3.3 V (Logic 1)
1
10
15
15
10
20
30
30
µA
Max
Turn on time delay(t_(ON))
Turn off time delay (t_(Off))
Bias pin input impedance
1
Time for I_S to reach 50% of final value
1
50
µs
Typ
kΩ
Typ
Amplifier output impedance
Off (Bias-1 = 1, Bias-2 = 1)
10||5
kΩ||pF
Typ
(2) GND pin useable range is from V_s– to (V_s+ – 2.5 V).
Table 1. LOGIC TABLE⁽¹⁾
BIAS-1
0
1
0
1
BIAS-2
0
0
1
1
FUNCTION
Full bias mode
Mid bias mode
Low bias mode
Shutdown mode
DESCRIPTION
Amplifiers ON with lowest distortion possible (default state)
Amplifiers ON with power savings with a reduction in distortion performance
Amplifiers ON with enhanced power savings and a reduction of performance
Amplifiers OFF and output has high impedance
(1) Logic pins should not be left floating and should be held at a logic-0 or a logic-1 by external circuitry.
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