THS6184_16 Datasheet, PDF (4/39 Pages) Texas Instruments – DUAL-PORT, LOW-POWER DIFFERENTIAL xDSL LINE DRIVER AMPLIFIERS

THS6184
SLLS635D – AUGUST 2005 – REVISED JANUARY 2009 ................................................................................................................................................. www.ti.com
ELECTRICAL CHARACTERISTICS
At V_S = ±12 V: R_F = 3 kΩ, R_L = 50 Ω, G = 5, R_adj = 0 Ω, full bias (unless otherwise noted) each amplifier independently tested.
PARAMETER
CONDITIONS
TYP
25°C
25°C
OVER TEMPERATURE
0°C to –40°C to
70°C 85°C
UNITS
MIN/
MAX
AC PERFORMANCE
G = 1, R_F = 4 kΩ
50
Small-signal bandwidth,
G = 2, R_F = 3.5 kΩ
40
–3 dB (V_O = 100 mV_RMS)
G = 5, R_F = 3 kΩ
30
G = 10, R_F = 3 kΩ
22
0.1-dB bandwidth flatness
G=5
8
MHz
Typ
MHz
Typ
Large-signal bandwidth
G = 5, V_O = 10 V_PP
17.5
Slew rate (25% to 75% level)
G = 5, V_O = 16-V step, single-ended
340
G = 5, V_O = 16-V step, differential
560
Rise and fall time
G = 5, V_O = 2 V_PP
12
2nd harmonic
G = 5,
R_L = 100 Ω
–89
V_O = 2 V_PP,
R_L = 50 Ω
–85
3rd harmonic
f = 1 MHz,
Differential
R_L = 100 Ω
–85
Harmonic distortion
R_L = 50 Ω
–79
2nd harmonic
G = 5,
R_L = 100 Ω
–83
V_O = 2 V_PP,
R_L = 50 Ω
–80
3rd harmonic
f = 4 MHz,
Differential
R_L = 100 Ω
–63
R_L = 50 Ω
–55
G = 10, PLine = 19.8 dBm, ADSL2
–74
Multitone Power Ratio (MTPR) 160 kHz to
ADSL limit⁽¹⁾
G = 10, PLine = 20.4 dBm, ADSL2+
–71
G = 10, PLine = 21.1 dBm, ADSL2++
–70
MHz
Typ
V/µs
Typ
V/µs
Typ
ns
Typ
dBc
Typ
dBc
Typ
dBc
Typ
G = 10, PLine = 19.8 dBm, ADSL2
–93
Receive Band Spill-Over 25kHz to 138 kHz G = 10, PLine = 20.4 dBm, ADSL2+
–91
dBc
Typ
G = 10, PLine = 21.1 dBm, ADSL2++
–90
Input voltage noise
f > 10 kHz
3
nV/√Hz
Typ
Inverting current noise
f > 10 kHz
5.9
pA/√Hz
Typ
Noninverting current noise
f > 10 kHz
1.2
pA/√Hz
Typ
DC PERFORMANCE
Open-loop transimpedance gain
Input offset voltage
R_L = 100 Ω
6
MΩ
Typ
±10
±22
±25
±25
mV
Max
Average offset voltage drift
±7
µV/°C
Typ
Input offset voltage matching
Channels 1 to 2 and 3 to 4 only
±0.5
±3
±5
±5
mV
Max
Noninverting Input bias current
±1
±10
±15
±15
µA
Max
Noninverting input bias current drift
±150
nA/°C
Typ
Inverting input bias current
±1
±10
±15
±15
µA
Max
Inverting input bias current drift
±150
nA/°C
Typ
INPUT CHARACTERISTICS
Common-mode input range
±10.2
±9.5
±9.4
±9.4
V
Min
Common-mode rejection ratio
67
60
58
58
dB
Min
Noninverting input resistance
500||2
kΩ||pF
Typ
Inverting input resistance
160
Ω
Typ
OUTPUT CHARACTERISTICS
(1) Test circuit is as shown in Figure 2. Transformer insertion loss = 0.4 dB. ADSL2++ is still considered a proposal and is not an official
standard at this time.
4
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