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DS100BR111A Datasheet, PDF (5/35 Pages) Texas Instruments – Ultra Low Power 10.3 Gbps 2-Channel Repeaters with Input Equalization and Output De-Emphasis
Pin Name
Pin Number I/O, Type
Pin Description
VOD_SEL
17
I, LVCMOS, VOD select.
Float
High = (VOD = 950 mV / 1150 mV)
(4-Levels) Float = (VOD = 850 mV)
20K = (VOD = 1050 mV)
Low = (VOD = 575 mV)
Note: DS100BR111A OUTA is limited to 575mV in pin mode,
see Table 4 for additional information.
Note: Setting VOD_SEL = High in SMBus Mode will force the
SMBus Address = B0'h
VDD_SEL
16
I, Internal
Enables the 3.3V to 2.5V internal regulator
Pull-up
Low = 3.3 V Operation
Float = 2.5 V Operation
MODE
18
I, LVCMOS, Controls Device Mode of Operation
Float
High = Continuous Talk (no output IDLE)
(4-Levels) Float = Slow OOB
20KΩ = eSATA Mode, Fast OOB, Auto Low Power on 100 uS of
inactivity. SD stays active.
Low = SAS Mode, Fast OOB
Status Output
LOS
13
O, Open
When HIGH, indicates Loss of Signal (Default is LOS on INA).
Drain
Can be modified via SMBus registers.
LOS Threshold Input
SD_TH
14
I, LVCMOS, The SD_TH pin controls LOS threshold setting;
Float
Assert (mV), Deassert (mV)
(4-Levels) 20K = 160 mV, 100 mV
Float = 180 mV, 110 mV (Default)
High = 190 mV, 130 mV
Low = 210 mV, 150 mV
Note: Using values less than the default level can extend the
time required to detect LOS and are not recommended.
Power
VDD
21, 22
Power
Power supply pins
2.5V mode connect to 2.5V
3.3V mode do not connect to any supply voltage. Should be used
to attach external decoupling to device, 100 - 200 nF recom-
mended.
Note: See Applications section for additional information.
VIN
15
Power
VIN = 3.3V +/-10% (input to internal LDO regulator)
Note: Must FLOAT for 2.5V operation. See Applications
section for additional information.
GND
DAP
Power
Ground pad (DAP - die attach pad).
Notes:
LVCMOS inputs without the “Float” conditions must be driven to a logic low or high at all times or operation is not
guaranteed. Unless the "Float" level is desired; 4-Level input pins require a minimum 1K resistor to GND, VDD (in 2.5V
mode), or VIN (in 3.3V mode). For additional information.Table 2: 4-Level Control Pin Settings
Input edge rate for LVCMOS/FLOAT inputs must be faster than 50 ns from 10–90%.
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