DRV8305_16 Datasheet, PDF (5/59 Pages) Texas Instruments – Three Phase Gate Driver

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DRV8305
SLVSCX2B – AUGUST 2015 – REVISED FEBRUARY 2016
External Components
COMPONENT
PIN 1
PIN 2
RECOMMENDED
C_PVDD
C_AVDD
C_DVDD
C_VCPH
C_{VCP_LSD}
C_CP1
C_CP2
C_VREG
R_VDRAIN
R_nFAULT
R_PWRGD
PVDD
AVDD
DVDD
VCPH
VCP_LSD
CP1H
CP2H
VREG
VDRAIN
nFAULT
PWRGD
GND
GND
GND
PVDD
GND
CP1L
CP2L
GND
PVDD
VCC ⁽¹⁾
VCC ⁽¹⁾
4.7-µF ceramic capacitor rated for PVDD
1-µF ceramic capacitor rated for 6.3 V
1-µF ceramic capacitor rated for 6.3 V
2.2-µF ceramic capacitor rated for 16 V
1-µF ceramic capacitor rated for 16 V
0.047-µF ceramic capacitor rated for PVDD
0.047-µF ceramic capacitor rated for PVDD × 2
1-µF ceramic capacitor rated for 6.3 V
100-Ω series resistor between VDRAIN and HS MOSFET DRAIN
1-10 kΩ pulled up the MCU power supply
1-10 kΩ pulled up the MCU power supply
(1) VCC is not a pin on the DRV8305, but a VCC supply voltage pullup is required for open-drain output nFAULT.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range referenced with respect to GND (unless otherwise noted) ⁽¹⁾
MIN
MAX
UNIT
Power supply voltage (PVDD)
–0.3
45
V
Power supply voltage ramp rate (VM)
0
2
V/µs
Charge pump voltage (CP1H,CP1L, CP2L,CP2H, VCPH, VCP_LSD)
–0.3
PVDD + 12
V
High side gate driver voltage (GHA, GHB, GHC)
–3
57
V
Low-side gate driver voltage (GHA, GHB, GHC)
–2
12
V
High side gate driver source pin voltage (SHA, SHB, SHC)
–5
45
V
Low-side gate driver source pin voltage (SLA, SLB, SLC)
–3
5
V
Internal phase clamp pin voltage difference {(GHA-SHA), (GHB-SHB), (GHC-SHC),
(GLA-SLA), (GLB-SLB), (GLC-SLC)}
–0.3
15
V
Drain pin voltage drain (VDRAIN)
–0.3
45
V
Max source current (VDRAIN) – limit current with external series resistor
–20
mA
Max sink current (VDRAIN)
2
mA
Voltage difference between supply and VDRAIN (PVDD-VDRAIN)
–10
10
V
Control pin voltage range (INHA, INLA, INHB, INLB, INHC, INLC, EN_GATE, SCLK,
SDI, SCS, SDO, nFAULT, PWRGD)
–0.3
5.5
V
Open drain pins skink current (nFAULT, PWRGD)
7
mA
Wake pin voltage (WAKE)
–0.3
45
V
Wake pin sink current (WAKE) – limit with external series resistor
1
mA
Sense amp voltage (SPA, SNA, SPB, SNB, SPC, SNC)
–2
5
V
Externally applied reference voltage (VREG) – when vreg_vref = 1
–0.3
5.5
V
Externally applied reference sink current (VREG) – when vreg_vref = 1
100
µA
Operating ambient temperature, T_A
Operating junction temperature, T_J
Storage temperature, T_stg
–40
125
°C
–40
150
°C
–55
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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