DRV8305_16 Datasheet, PDF (28/59 Pages) Texas Instruments – Three Phase Gate Driver

DRV8305
SLVSCX2B – AUGUST 2015 – REVISED FEBRUARY 2016
7.3.8.5 Fault and Warning Operating Modes
NAME
PVDD Undervoltage
Fault (PVDD_UVLO)
PVDD Undervoltage
Warning (PVDD_UVFL)
PVDD Overvoltage
Warning (PVDD_OVFL)
Charge Pump Undervoltage
Warning (VCPH_UVFL)
Charge Pump Undervoltage
Fault (VCPH_UVLO2)
LS Gate Supply Undervoltage
Fault (VCP_LSD_UVLO2)
Charge Pump Overvoltage
Fault (VCPH_OVLO)
AVDD Undervoltage
Fault (AVDD_UVLO)
Temperature Flag
Warning (TEMP_FLAGX)
Overtemperature Warning
(OTW)
Overtemperature Shutdown
Fault (OTSD)
MOSFET Overcurrent
Fault (VDS_OCP)
LS Overcurrent
Fault (SNS_OCP)
Gate Drive Fault
(GDF)
MCU Watchdog
Fault (WD_FAULT)
Table 5. Fault and Warning Operating Modes⁽¹⁾
CONDITION
PVDD < V_{PVDD_UVLO1}
PVDD < V_{PVDD_UVLO2}
GATE DRIVE OUTPUTS
PL
PL
GATE DRIVE SUPPLIES
D
D
PVDD < V_{PVDD_UVFL}
E
E
PVDD > V_{PVDD_OVFL}
E
E
VCPH < V_{VCPH_UVFL}
E
E
VCPH < V_{VCPH_UVLO2}
PL
D
VCP_LSD < V_{VCP_LSD_UVLO2}
PL
D
VCPH > V_{VCPH_OVLO}
PL
D
VCPH > V_{VCPH_OVLO_ABS}
PL
D
AVDD < V_{AVDD_UVLO}
PL
D
T_J > T_{TEMP_FLAGX}
E
E
T_J > T_OTW
E
E
T_J > T_OTSD
Latched Shutdown
V_DS > V_{VDS_LEVEL}
Report Only
V_DS > V_{VDS_LEVEL}
Disabled
V_DS > V_{VDS_LEVEL}
SLx > V_{SNS_OCP}
PL
D
PL
E
E
E
E
E
PL
E
See TDRIVE
PL
D
t_INTERVAL > t_{WD_DLY}
PL
E
VREG Undervoltage
Fault (VREG_UV)
VREG < V_{VREG_UV}
PL
E
(1) E - Enabled, PL = Pulled Low, D = Disabled
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INTERNAL LOGIC
D
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
DEVICE ACTION
-
SPI
nFAULT Latch
SPI
nFAULT Toggle
SPI
nFAULT Toggle
SPI
nFAULT Toggle
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
SPI
nFAULT Toggle
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
nFAULT Toggle
-
SPI
nFAULT Latch
SPI
nFAULT Latch
SPI
PWRGD
nFAULT Latch
SPI
PWRGD
nFAULT Latch
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