BQ24618_15 Datasheet, PDF (5/43 Pages) Texas Instruments – System Power Selector and Low

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bq24618
SLUSA55B – OCTOBER 2010 – REVISED APRIL 2015
Pin Functions (continued)
PIN
NAME
NO.
DESCRIPTION
LODRV
19 PWM low-side driver output. Connect to the gate of the low-side power MOSFET with a short trace.
Open-drain power good status output. Active LOW when IC has a valid VCC (not in UVLO or ACOV or SLEEP
PG
8 mode). Active HIGH when IC has an invalid VCC. PG can be used to drive an LED or communicate with a host
processor.
PH
20
PWM high-side driver negative supply. Connect to the phase-switching node (junction of the low-side power
MOSFET drain, high-side power MOSFET source, and output inductor).
REGN
PWM low-side driver positive 6-V supply output. Connect a 1-μF ceramic capacitor from REGN to the GND pin, close
18 to the IC. Use for low-side driver and high-side driver bootstrap voltage by connecting a small-signal Schottky diode
from REGN to BTST.
SRN
Charge current sense resistor, negative input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide
13 differential-mode filtering. An optional 0.1-μF ceramic capacitor is placed from the SRN pin to GND for common-
mode filtering.
SRP
14
Charge current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to provide
differential-mode filtering. A 0.1-μF ceramic capacitor is placed from the SRP pin to GND for common-mode filtering.
STAT1
5 Open-drain charge status pin to indicate various charger operations (see Table 2).
Thermal
Pad
Exposed pad beneath the IC. Always solder the thermal pad to the board, and have vias on the thermal-pad plane
— star-connecting to GND and to the ground plane for a high-current power converter. It also serves as a thermal pad
to dissipate the heat.
TS
6
Temperature qualification voltage input for battery pack negative temperature coefficient thermistor. Program the hot
and cold temperature window with a resistor divider from VREF to TS to GND (see Figure 15).
Safety Timer and termination control. Connect a capacitor from this node to GND to set the timer. When this input is
TTC
7 LOW, the timer and termination are disabled. When this input is HIGH, the timer is disabled but termination is
allowed.
STAT2
9 Open-drain charge status pin to indicate various charger operations (see Table 2).
VFB
12
Output voltage analog feedback adjustment. Connect the output of a resistive voltage divider from the battery
terminals to this node to adjust the output battery regulation voltage.
VREF
10
3.3-V regulated voltage output. Place a 1-μF ceramic capacitor from VREF to GND pin close to the IC. This voltage
could be used for programming of voltage and current regulation and for programming the TS threshold.
VCC
IC power positive supply. Connect through a 10-Ω to the common-source (diode-OR) point: source of high-side P-
24 channel MOSFET and source of reverse-blocking power P-channel MOSFET. Place a 1-μF ceramic capacitor from
VCC to the GND pin close to the IC.
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