BQ24618_15 Datasheet, PDF (4/43 Pages) Texas Instruments – System Power Selector and Low

bq24618
SLUSA55B – OCTOBER 2010 – REVISED APRIL 2015
6 Pin Configuration and Functions
RGE Package
24-Pin VQFN
Top View
www.ti.com
24 23 22 21 20 19
ACN ¹
18 _REGN
ACP ²
17 _GND
ACDRV 3
16 ACSET
CE ⁴
15 _ISET2
STAT1 ⁵
14 _SRP
TS ⁶
13 SRN
7 8 9 10 11 12
Pin Functions
PIN
NAME
NO.
DESCRIPTION
ACDRV
AC adapter to system MOSFET driver output. Connect through a 1-kΩ resistor to the gate of the ACFET P-channel
power MOSFET and the reverse conduction blocking P-channel power MOSFET. The internal gate drive is
3 asymmetrical, allowing a quick turnoff and slow turnon, in addition to the internal break-before-make logic with
respect to BATDRV. If needed, an optional capacitor from gate to source of the ACFET is used to slow down the ON
and OFF times.
ACN
Adapter current sense resistor, negative input. A 0.1-μF ceramic capacitor is placed from ACN to ACP to provide
1 differential-mode filtering. An optional 0.1-μF ceramic capacitor is placed from the ACN pin to GND for common-
mode filtering.
ACP
2
Adapter current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from ACN to ACP to provide
differential-mode filtering. A 0.1-μF ceramic capacitor is placed from the ACP pin to GND for common-mode filtering.
ACSET
16
Adapter current set input. The voltage on the ACSET pin programs the input current regulation set point during
Dynamic Power Management (DPM).
BATDRV
Battery-to-system MOSFET driver output. Gate drive for the battery-to-system load BAT PMOS power FET to isolate
the system from the battery to prevent current flow from the system to the battery, while allowing a low-impedance
path from battery to system. Connect this pin through a 1-kΩ resistor to the gate of the input BAT P-channel
23 MOSFET. Connect the source of the FET to the system load voltage node. Connect the drain of the FET to the
battery pack positive terminal. The internal gate drive is asymmetrical to allow a quick turnoff and slow turnon, in
addition to the internal break-before-make logic with respect to ACDRV. If needed, an optional capacitor from gate to
source of the BATFET is used to slow down the ON and OFF times.
BTST
PWM high-side driver positive supply. Connect to the phase-switching node (junction of the low-side power MOSFET
22 drain, high-side power MOSFET source, and output inductor). Connect the 0.1-μF bootstrap capacitor from PH to
BTST, and a bootstrap Schottky diode from REGN to BTST.
CE
4
Charge enable active HIGH logic input. HI enables charge. LO disables charge. It has an internal 1-MΩ pulldown
resistor.
GND
17 Low current sensitive analog and digital ground. On PCB layout, connect with thermal pad underneath the IC.
HIDRV
21 PWM high-side driver output. Connect to the gate of the high-side power MOSFET with a short trace.
ISET1
11 Fast charge current set input. The voltage on the ISET1 pin programs the fast charge current regulation set point.
ISET2
15
Precharge and termination current set input. The voltage on the ISET2 pin programs the precharge current regulation
set point and termination current trigger point.
4
Submit Documentation Feedback
Product Folder Links: bq24618
Copyright © 2010–2015, Texas Instruments Incorporated