BQ24618_15 Datasheet, PDF (20/43 Pages) Texas Instruments – System Power Selector and Low

bq24618
SLUSA55B – OCTOBER 2010 – REVISED APRIL 2015
www.ti.com
Feature Description (continued)
cycle PWM request. Internal gate-drive logic allows achieving 99.5% duty cycle while ensuring the N-channel
upper device always has enough voltage to stay fully on. If the BTST pin to PH pin voltage falls below 4.2 V for
more than three cycles, then the high-side N-channel power MOSFET is turned off and the low-side N-channel
power MOSFET is turned on to pull the PH node down and recharge the BTST capacitor. Then the high-side
driver returns to 100% duty-cycle operation until the BTST-to-PH voltage is detected to fall low again due to
leakage current discharging the BTST capacitor below 4.2 V, and the reset pulse is reissued.
The fixed-frequency oscillator keeps tight control of the switching frequency under all conditions of input voltage,
battery voltage, charge current, and temperature, simplifying output filter design and keeping it out of the audible
noise region. Also see Application and Implementation for selection of the inductor, capacitor, and MOSFET.
8.3.11 Synchronous and Nonsynchronous Operation
The charger operates in synchronous mode when the SRP-SRN voltage is above 5 mV (0.5-A inductor current
for a 10-mΩ sense resistor). During synchronous mode, the internal gate-drive logic ensures there is break-
before-make complementary switching to prevent shoot-through currents. During the 30-ns dead time where both
FETs are off, the body diode of the low-side power MOSFET conducts the inductor current. Having the low-side
FET turn on keeps the power dissipation low and allows safely charging at high currents. During synchronous
mode, the inductor current is always flowing and the converter operates in Continuous Conduction Mode (CCM),
creating a fixed two-pole system.
The charger operates in nonsynchronous mode when the SRP-SRN voltage is below 5 mV (0.5-A inductor
current for a 10-mΩ sense resistor). The charger is forced into nonsynchronous mode when battery voltage is
lower than 2 V or when the average SRP-SRN voltage is lower than 1.25 mV.
During nonsynchronous operation, the body diode of the low-side MOSFET can conduct the positive inductor
current after the high-side N-channel power MOSFET turns off. When the load current decreases and the
inductor current drops to zero, the body diode is naturally turned off and the inductor current becomes
discontinuous. This mode is called Discontinuous Conduction Mode (DCM). During DCM, the low-side N-channel
power MOSFET turns on for around 80 ns when the bootstrap capacitor voltage drops below 4.2 V. Then the
low-side power MOSFET turns off and stays off until the beginning of the next cycle, where the high-side power
MOSFET is turned on again. The 80-ns low-side MOSFET on-time is required to ensure the bootstrap capacitor
is always recharged and able to keep the high-side power MOSFET on during the next cycle. This is important
for battery chargers, where unlike regular DC-DC converters, there is a battery load that maintains a voltage and
can both source and sink current. The 80-ns low-side pulse pulls the PH node (the connection between high- and
low-side MOSFETs) down, allowing the bootstrap capacitor to recharge up to the REGN LDO value. After 80 ns,
the low-side MOSFET is kept off to prevent negative inductor current from occurring.
At very low currents during nonsynchronous operation, there may be a small amount of negative inductor current
during the 80-ns recharge pulse. The charge should be low enough to be absorbed by the input capacitance.
Whenever the converter goes into zero-percent duty cycle, the high-side MOSFET does not turn on, and the low-
side MOSFET does not turn on (only 80-ns recharge pulse) either, and there is almost no discharge from the
battery.
During the DCM mode, the loop response automatically changes and has a single pole system at which the pole
is proportional to the load current, because the converter does not sink current, and only the load provides a
current sink. This means at very low currents the loop response is slower, as there is less sinking current
available to discharge the output voltage.
8.3.12 Cycle-by-Cycle Charge Undercurrent Protection
If the SRP-SRN voltage decreases below 5 mV (the charger is also forced into nonsynchronous mode when the
average SRP-SRN voltage is lower than 1.25 mV), the low-side FET is turned off for the remainder of the
switching cycle to prevent negative inductor current. During DCM, the low-side FET only turns on for around 80
ns when the bootstrap capacitor voltage drops below 4.2 V to provide refresh charge for the bootstrap capacitor.
This is important to prevent negative inductor current from causing a boost effect in which the input voltage
increases as power is transferred from the battery to the input capacitors and leads to an overvoltage stress on
the VCC node, potentially causing damage to the system.
20
Submit Documentation Feedback
Product Folder Links: bq24618
Copyright © 2010–2015, Texas Instruments Incorporated