MSP432P401R_16 Datasheet, PDF (48/200 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP432P401R, MSP432P401M
SLAS826E – MARCH 2015 – REVISED JULY 2016
www.ti.com
Table 5-10 lists the characteristics of the high-frequency crystal oscillator, HFXT.
Table 5-10. High-Frequency Crystal Oscillator, HFXT
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
I_DVCC,HFXT
f_HFXT
PARAMETER
HFXT oscillator crystal current
HF mode at typical ESR
HFXT oscillator crystal
frequency, crystal mode
TEST CONDITIONS
f_OSC = 1 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 0,
HFFREQ = 0, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 4 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 0, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 8 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 1, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 16 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 2, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 24 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 3, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 32 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 4, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 40 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 5, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
f_OSC = 48 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1,
HFFREQ = 6, C_L,eff = 16 pF,
Typical ESR and C_SHUNT
HFXTBYPASS = 0, HFFREQ = 0 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 1 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 2 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 3 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 4 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 5 ⁽¹⁾
HFXTBYPASS = 0, HFFREQ = 6 ⁽¹⁾
V_CC
MIN TYP
40
60
100
180
3.0 V
260
320
480
550
1
4.01
8.01
16.01
24.01
32.01
40.01
DC_HFXT
f_HFXT,SW
HFXT oscillator duty cycle
HFXT oscillator logic-level
square-wave input frequency,
bypass mode
Measured at MCLK or HSMCLK,
f_HFXT = 1 MHz to 48 MHz
HFXTBYPASS = 1 ⁽¹⁾⁽²⁾
40% 50%
0.8
DC_{HFXT, SW}
HFXT oscillator logic-level
square-wave input duty cycle
HFXTBYPASS = 1,
External clock used as a direct source to
MCLK or HSMCLK with no divider
(DIVM = 0 or DIVHS = 0).
HFXTBYPASS = 1,
External clock used as a direct source to
MCLK or HSMCLK with divider (DIVM > 0
or DIVHS > 0) or not used as a direct
source to MCLK or HSMCLK.
45%
40%
MAX UNIT
µA
4
8
16
24 MHz
32
40
48
60%
48 MHz
55%
60%
(1) Maximum frequency of operation of the entire device cannot be exceeded.
(2) When HFXTBYPASS is set, HFXT circuits are automatically powered down. Input signal is a digital square wave with parametrics
defined in the Schmitt-trigger Inputs section of this data sheet. Duty cycle requirements are defined by DC_{HFXT, SW}.
48
Specifications
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