G2R-14-12VDC Datasheet, PDF (44/73 Pages) Texas Instruments – Ultralow Power NTSC/PAL/SECAM Video Decoder With RObust Sync Detector

2.20.28 Interrupt Enable Register B
Address
1Dh
Default
00h
7
Software initialization
occurred enable
6
Macrovision
detect changed
5
Reserved
4
Field rate
changed
3
Line alternation
changed
2
Color lock
changed
1
H/V lock
changed
0
TV/VCR
changed
Interrupt enable register B is used by the external processor to mask unnecessary interrupt sources for interrupt B.
Bits loaded with a 1 allow the corresponding interrupt condition to generate an interrupt on the external pin.
Conversely, bits loaded with 0s mask the corresponding interrupt condition from generating an interrupt on the
external pin. This register only affects the external pin, it does not affect the bits in the interrupt status register. A given
condition can set the appropriate bit in the status register and not cause an interrupt on the external pin. To determine
if this device is driving the interrupt pin either AND interrupt status register B with interrupt enable register B or check
the state of interrupt B in the interrupt B active register.
Software initialization occurred enable:
0 = Disabled (default)
1 = Enabled
Macrovision detect changed:
0 = Disabled (default)
1 = Enabled
Field rate changed:
0 = Disabled (default)
1 = Enabled
Line alternation changed:
0 = Disabled (default)
1 = Enabled
Color lock changed:
0 = Disabled (default)
1 = Enabled
H/V lock changed:
0 = Disabled (default)
1 = Enabled
TV/VCR changed:
0 = Disabled (default)
1 = Enabled
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