G2R-14-12VDC Datasheet, PDF (43/73 Pages) Texas Instruments – Ultralow Power NTSC/PAL/SECAM Video Decoder With RObust Sync Detector

2.20.27 Interrupt Reset Register B
Address
1Ch
Default
00h
7
Software
initialization
reset
6
Macrovision
detect changed
reset
5
Reserved
4
3
2
1
0
Field rate Line alternation Color lock
H/V lock
TV/VCR
changed reset changed reset changed reset changed reset changed reset
Interrupt reset register B is used by the external processor to reset the interrupt status bits in interrupt status
register B. Bits loaded with a 1 allow the corresponding interrupt status bit to reset to 0. Bits loaded with a 0 have no
effect on the interrupt status bits.
Software initialization reset:
0 = No effect (default)
1 = Reset software initialization bit
Macrovision detect changed reset:
0 = No effect (default)
1 = Reset Macrovision detect changed bit
Field rate changed reset:
0 = No effect (default)
1 = Reset field rate changed bit
Line alternation changed reset:
0 = No effect (default)
1 = Reset line alternation changed bit
Color lock changed reset:
0 = No effect (default)
1 = Reset color lock changed bit
H/V lock changed reset:
0 = No effect (default)
1 = Reset H/V lock changed bit
TV/VCR changed reset [TV/VCR mode is determined by counting the total number of lines/frame. The mode switches
to VCR for nonstandard number of lines]:
0 = No effect (default)
1 = Reset TV/VCR changed bit
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