CC3220MOD Datasheet, PDF (42/82 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless Module Solution

CC3220MOD
SWRS206 – MARCH 2017
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5.14.3.2 I2S
The McASP interface functions as a general-purpose audio serial port optimized for multichannel audio
applications and supports transfer of two stereo channels over two data pins. The McASP consists of
transmit and receive sections that operate synchronously and have programmable clock and frame-sync
polarity. A fractional divider is available for bit-clock generation.
5.14.3.2.1 I2S Transmit Mode
Figure 5-10 shows the timing diagram for the I2S transmit mode.
I2
I1
I3
McACLKX
McAFSX
I4
I4
McAXR0/1
SWAS032-015
Figure 5-10. I2S Transmit Mode Timing Diagram
Table 5-6 lists the timing parameters for the I2S transmit mode.
Table 5-6. I2S Transmit Mode Timing Parameters
PARAMETER
NUMBER
MIN
I1
f_clk ⁽¹⁾
I2
t^{LP (1)}
Clock frequency
Clock low period
I3
t_HT ⁽¹⁾
I4
t_OH ⁽¹⁾
Clock high period
TX data hold time
(1) Timing parameter assumes a maximum load of 20 pF.
5.14.3.2.2 I2S Receive Mode
Figure 5-11 shows the timing diagram for the I2S receive mode.
MAX
9.216
1/2 fclk
1/2 fclk
22
UNIT
MHz
ns
ns
ns
I2
I1
I3
McACLKX
McAFSX
I5
I4
McAXR0/1
SWAS032-016
Figure 5-11. I2S Receive Mode Timing Diagram
42
Specifications
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