CC3220MOD Datasheet, PDF (41/82 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless Module Solution

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5.14.3.1.2 SPI Slave
Figure 5-9 shows the timing diagram for the SPI slave.
I2
CLK
I6
MISO
MOSI
I7
I8
Figure 5-9. SPI Slave Timing Diagram
Table 5-5 lists the timing parameters for the SPI slave.
Table 5-5. SPI Slave Timing Parameters
PARAMETER
NUMBER
F ⁽¹⁾
I2
T_clk ⁽¹⁾
D ⁽¹⁾
I6
t_IS ⁽¹⁾
I7
t_IH ⁽¹⁾
I8
t_OD ⁽¹⁾
I9
t_OH ⁽¹⁾
Clock frequency @ VBAT = 3.3 V
Clock frequency @ VBAT ≤ 2.3 V
Clock period
Duty cycle
RX data setup time
RX data hold time
TX data output delay
TX data hold time
(1) Timing parameter assumes a maximum load of 20 pF at 3.3 V.
CC3220MOD
SWRS206 – MARCH 2017
I9
SWAS032-017
MIN
50
45%
4
4
MAX
20
12
55%
20
24
UNIT
MHz
ns
ns
ns
ns
ns
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Specifications
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