CC3220MOD Datasheet, PDF (27/82 Pages) Texas Instruments – SimpleLink Wi-Fi CERTIFIED Wireless Module Solution

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CC3220MOD
SWRS206 – MARCH 2017
(10) This pin is shared by the ADC inputs and digital I/O pad cells.
NOTE
The ADC inputs are tolerant up to 1.8 V. On the other hand, the digital pads can tolerate up to 3.6 V. Hence, take care to prevent accidental
damage to the ADC inputs. TI recommends first disabling the output buffers of the digital I/Os corresponding to the desired ADC channel (that is,
converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47], S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more
information, see Drive Strength and Reset States for Analog-Digital Multiplexed Pins.
4.5 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
Table 4-4 describes the use, drive strength, and default state of analog- and digital-multiplexed pins at first-time power up and reset (nRESET
pulled low).
Table 4-4. Drive Strength and Reset States for Analog-Digital Multiplexed Pins
PIN
BOARD LEVEL CONFIGURATION AND USE
DEFAULT STATE AT FIRST POWER UP OR
FORCED RESET
STATE AFTER CONFIGURATION OF ANALOG
SWITCHES (ACTIVE, LPDS, and HIB POWER
MODES)
MAXIMUM
EFFECTIVE DRIVE
STRENGTH (mA)
25
Connected to the enable pin of the RF switch Analog is isolated. The digital I/O cell is also
(ANT_SEL1). Other use is not recommended. isolated.
Determined by the I/O state, as are other digital
I/Os.
4
26
Connected to the enable pin of the RF switch Analog is isolated. The digital I/O cell is also
(ANT_SEL2). Other use is not recommended. isolated.
Determined by the I/O state, as are other digital
I/Os.
4
44 Generic I/O
Analog is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
42 Generic I/O
Analog is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
47
Analog signal (1.8-V absolute, 1.46-V full scale)
ADC is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
48
Analog signal (1.8-V absolute, 1.46-V full scale)
ADC is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
49
Analog signal (1.8-V absolute, 1.46-V full scale)
ADC is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
50
Analog signal (1.8-V absolute, 1.46-V full scale)
ADC is isolated. The digital I/O cell is also
isolated.
Determined by the I/O state, as are other digital
I/Os.
4
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Terminal Configuration and Functions
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