TMS320DM640AZNZ4 Datasheet, PDF (41/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

(Transmit/Receive Data Pins)
AXR0[0]
AXR0[1]
8-Serial Ports
Flexible
Partitioning
Tx, Rx, OFF
Pin Assignments
(Transmit/Receive Data Pins)
AXR0[2]
AXR0[3]
(Receive Bit Clock)
ACLKR0
AHCLKR0
(Receive Master Clock)
AFSR0
(Receive Frame Sync or
Left/Right Clock)
Receive Clock
Generator
Receive Clock
Check Circuit
Transmit
Clock
Generator
Transmit
Clock Check
Circuit
Receive
Frame Sync
Transmit
Frame Sync
Error Detect
(see Note A )
Auto Mute
Logic
(Transmit Bit Clock)
ACLKX0
AHCLKX0
(Transmit Master Clock)
AFSX0
(Transmit Frame Sync or
Left/Right Clock)
AMUTE0
AMUTEIN0
McASP0
(Multichannel Audio Serial Port 0)
NOTES: A. The McASPs’ Error Detect function detects underruns, overruns, early/late frame syncs, DMA errors, and external mute input.
B. Bolded and italicized text within parentheses denotes the function of the pins in an audio system.
Figure 1−6. Peripheral Signals (Continued)
1.9.3 Terminal Functions
The terminal functions table (Table 1−6) identifies the external signal names, the associated pin (ball) numbers
along with the mechanical package designator, the pin type (I, O/Z, or I/O/Z), whether the pin has any internal
pullup/pulldown resistors and a functional pin description. For more detailed information on device
configuration, peripheral selection, multiplexed/shared pins, and debugging considerations, see the Device
Configurations section of this data sheet.
June 2003 − Revised October 2010
SPRS222F
41