TMS320DM640AZNZ4 Datasheet, PDF (27/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Memory Map Summary
1.7 Memory Map Summary
Table 1−5 shows the memory map address ranges of the DM641/DM640 device. Internal memory is always
located at address 0 and can be used as both program and data memory. The external memory address
ranges in the DM641/DM640 device begin at the hex address location 0x8000 0000 for EMIFA.
Table 1−5. TMS320DM641/DM640 Memory Map Summary
MEMORY BLOCK DESCRIPTION
BLOCK SIZE
(BYTES)
HEX ADDRESS RANGE
Internal RAM (L2)
128K
0000 0000 – 0001 FFFF
Reserved
768K
0004 0000 – 000F FFFF
Reserved
23M
0010 0000 – 017F FFFF
External Memory Interface A (EMIFA) Registers
256K
0180 0000 – 0183 FFFF
L2 Registers
256K
0184 0000 – 0187 FFFF
HPI Registers (DM641 only)^†
256K
0188 0000 – 018B FFFF
McBSP 0 Registers
256K
018C 0000 – 018F FFFF
McBSP 1 Registers
256K
0190 0000 – 0193 FFFF
Timer 0 Registers
256K
0194 0000 – 0197 FFFF
Timer 1 Registers
256K
0198 0000 – 019B FFFF
Interrupt Selector Registers
256K
019C 0000 – 019F FFFF
EDMA RAM and EDMA Registers
256K
01A0 0000 – 01A3 FFFF
Reserved
512K
01A4 0000 – 01AB FFFF
Timer 2 Registers
256K
01AC 0000 – 01AF FFFF
GP0 Registers
256K − 4K
01B0 0000 – 01B3 EFFF
Device Configuration Registers
4K
01B3 F000 – 01B3 FFFF
I2C0 Data and Control Registers
16K
01B4 0000 – 01B4 3FFF
Reserved
32K
01B4 4000 – 01B4 BFFF
McASP0 Control Registers
16K
01B4 C000 – 01B4 FFFF
Reserved
192K
01B5 0000 – 01B7 FFFF
Reserved
256K
01B8 0000 – 01BB FFFF
Emulation
256K
01BC 0000 – 01BF FFFF
Reserved
256K
01C0 0000 – 01C3 FFFF
VP0 Control
16K
01C4 0000 – 01C4 3FFF
VP1 Control (DM641 only)^†
16K
01C4 4000 – 01C4 7FFF
Reserved
32K
01C4 8000 – 01C4 FFFF
Reserved
192K
01C5 0000 – 01C7 FFFF
EMAC Control
4K
01C8 0000 – 01C8 0FFF
EMAC Wrapper
8K
01C8 1000 – 01C8 2FFF
EWRAP Registers
2K
01C8 3000 – 01C8 37FF
MDIO Control Registers
2K
01C8 3800 – 01C8 3FFF
Reserved
3.5M
01C8 4000 – 01FF FFFF
QDMA Registers
52
0200 0000 – 0200 0033
Reserved
928M – 52
0200 0034 – 2FFF FFFF
McBSP 0 Data
64M
3000 0000 – 33FF FFFF
† _{For the DM640 device, these memory address locations are reserved.The DM640 device does not support the HPI and VP1 peripherals.}
June 2003 − Revised October 2010
SPRS222F
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