GC5328 Datasheet, PDF (4/27 Pages) Texas Instruments – GC5328 Low-Power Wideband Digital Predistortion Transmit Processor

GC5328
SLWS218A – OCTOBER 2009 – REVISED OCTOBER 2009
BASEBAND CLOCK (CMOS)
LOW JITTER
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Customer LOGIC
BBCLK
START_FRAME
TIME
DIVISON
MULTIPLEXED
BASEBAND
DATA
TX SYNC
REFERENCE
TX SYNC 2
REFERENCE
START of MUX-FRAME
BBDATA[17:2]
BBDATA[1:0]
TX SYNC REFERENCE
TX SYNC 2 REFERENCE
DGND
GC532x
BBCLK
BBFR
BBDATA[15:0]
MFIO[19:18]
SYNC A
SYNC B
SYNC C
Figure 3. Baseband and Sync Interface to GC5328
B0370-01
BASEBAND CLOCK INPUT
The baseband clock input is a CMOS, low-jitter clock.
GAIN/PILOT INSERTION/AntCal INSERTION/POWER METER
Baseband gain can be applied on a per-carrier basis to control the individual channel power accurately through
the system. A UMTS pilot sequence at a programmable gain can be added for antenna calibration. Each
individual baseband channel has an integrated I² + Q² power accumulator. The baseband power meters have a
common integration counter and interval counter for all channels. The GPP block has an IPDL detection and
control section to select one of four CFR memories when IPDL autoselection is used. Normally, IPDL 0 is
manually selected.
DIGITAL UPCONVERTERS (DUCs)
The GC5328 DUC block has interpolation filters, programmable delays, and complex mixers for each channel.
There are two DUC blocks within the GC5328. The sum chain after the DUC channel combines the DUC channel
streams or the bypass stream and sends the data to the CFR block. Each DUC can operate in one wide, two
medium, or six CDMA channels. Each DUC has a PFIR for spectral shaping, a CFIR for interpolation and image
rejection, and a bulk interpolation CIC.
The 2 DUCs can support:
• (6 channel/DUC mode) up to 12 – 1.23(8) Mhz CDMA, 1xEVDO, or TDSCDMA carriers
• (2 channel/DUC mode) up to 4 – WCDMA or LTE-5 carriers
• (1 channel/DUC mode) up to 2 – Wibro, Wimax, LTE 10 carriers
• (1 channel/DUC mode) 1 – Wimax or LTE20 carrier
Users can specify the filter characteristics of the DUC. The filters are the programmable finite impulse response
(PFIR), compensating finite impulse response (CFIR), and cascade integrator comb (CIC) filters. Users can also
specify the center frequencies of each carrier with a resolution of 0.25 mHz. Additional controls available in the
DUCs include bulk and fractional-time delay adjustments, phase adjustments, and equalization. The maximum
DUC output bandwidth is 40 MHz.
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