DS90C3201_14 Datasheet, PDF (4/23 Pages) Texas Instruments – 3.3V 8 MHz to 135 MHz Dual FPD-Link Transmitter

DS90C3201
SNLS192D – APRIL 2005 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings ⁽¹⁾
Supply Voltage (V_DD)
LVCMOS/LVTTL Input Voltage
LVCMOS/LVTTL Output Voltage
LVDS Output Voltage
LVDS Short Circuit Duration
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Maximum Package Power Dissipation Capacity at 25°C
Package Derating
ESD Rating
128 TQFP Package
HBM, 1.5kΩ, 100pF
EIAJ, 0Ω, 200pF
−0.3V to +4V
−0.3V to (V_DD + 0.3V)
−0.3V to (V_DD + 0.3V)
−0.3V to (V_DD + 0.3V)
Continuous
+150°C
−65°C to +150°C
+260°C
1.4W
25.6mW/°C above +25°C
> 2 kV
> 200 V
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Recommended Operating Conditions
Supply Voltage (V_DD)
Operating Free Air Temperature (T_A)
Supply Noise Voltage (V_P-P)
Transmitter Input Range
Input Clock Frequency (f)
TCLKIN Period (T_CIP)
Min
3.15
0
0
8
7.4
Nom
3.3
+25
Max
3.6
+70
±100
V_DD
135
125
Unit
V
°C
mV_P-P
V
MHz
ns
Electrical Characteristics ^{(1) (2) (3)}
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
LVCMOS/LVTTL DC SPECIFICATIONS (Tx inputs, control inputs)
V_IH
High Level Input Voltage
V_IL
Low Level Input Voltage
V_CL
Input Clamp Voltage
I_IN
Input Current
LVDS TRANSMITTER DC SPECIFICATIONS
I_CL = −18mA
0V ≤ V_IN ≤ V_DD
V_IN = 0V
2.0
V_DD
V
0
0.8
V
−0.8
−1.5
V
+10
µA
−10
0
µA
V_OD
Differential Output Voltage
(Programmable register)
R_L = 100Ω, Register addr 28d/1ch
bit [5] (TXE) = 0b,
bit [4] (TXO) = 0b (Default)
200
400
620
mV
R_L = 100Ω, Register addr 28d/1ch
bit [5] (TXE) = 1b,
bit [4] (TXO) = 1b
100
250
400
mV
ΔV_OD
Change in V_OD between
complimentary output states
R_L = 100Ω
50
mV
(1) Typical values are given for V_DD = 3.3V and T _A = +25°C.
(2) Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground
unless otherwise specified.
(3) The Minimum and Maximum Limits are based on statistical analysis of the device performance over process, voltage and temperature
ranges. This parameter is functional tested only on Automatic Test Equipment (ATE).
4
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