DS90C3201_14 Datasheet, PDF (2/23 Pages) Texas Instruments – 3.3V 8 MHz to 135 MHz Dual FPD-Link Transmitter

DS90C3201
SNLS192D – APRIL 2005 – REVISED APRIL 2013
Block Diagram
7
TXOA [6:0]
7
TXOB[6:0]
7
TXOC [6:0]
7
TXOD [6:0]
7
TXOE[6:0]
7
TXEA[6:0]
7
TXEB[6:0]
7
TXEC[6:0]
7
TXED[6:0]
7
TXEE[6:0]
TXOA-/+
TXOB-/+
TXOC-/+
TXOD-/+
TXOE-/+
TXEA -/+
TXEB -/+
TXEC-/+
TXED-/+
TXEE -/+
TCLKIN
PLL
RFB
PWDNB
MODE0
MODE1
S2CLK
S2DAT
TCLKOUT -/+
Figure 1. Transmitter Block Diagram
Typical Application Diagram
Host
(PC, Graphics Board, Video Processor)
Video
Source
DE
Pixel Data
Clock
HSYNC
VSYNC
DS90C3201
FPD-Link
Transmitter
LVDS
5 Pairs
5 Pairs
LVDS Clock
2-Wire Serial
Interface
Display
(LCD Monitor, LCD TV, Digital TV)
DS90C3202
FPD-Link
Receiver
DE
Pixel Data
Clock
HSYNC
VSYNC
Digital
Display
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Figure 2. LCD Panel Application Diagram
Functional Description
The DS90C3201 and DS90C3202 are a dual 10-bit color Transmitter and Receiver FPD-Link chipset designed to
transmit data at clocks speeds from 8 to 135 MHz. DS90C3201 and DS90C3202 are designed to interface
between the digital video processor and the display using a LVDS interface. The DS90C3201 transmitter
serializes 2 channels of video data (10-bit each for RGB for each channel, totaling 60 bits) and control signals
(HSYNC, VSYNC, DE and two user-defined signals) along with clock signal to 10 channels of LVDS signals and
transmits them. The DS90C3202 receiver converts 10 channels of LVDS signals into parallel signals and outputs
2
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