BQ500101 Datasheet, PDF (4/20 Pages) Texas Instruments – NexFET Power Stage

bq500101
SLPS585 – MARCH 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings⁽¹⁾
T_A = 25°C (unless otherwise noted)
V_IN to P_GND
V_SW to P_GND , V_IN to V_SW
V_SW to P_GND, V_IN to V_SW (<10 ns)
V_DD to P_GND
PWM
BOOT to P_GND
BOOT to P_GND (<10 ns)
BOOT to BOOT_R
BOOT to BOOT_R (duty cycle <0.2%)
P_D
Power dissipation
T_J
Operating temperature
T_stg
Storage temperature
MIN
MAX
UNIT
–0.3
30
V
–0.3
30
V
–7
33
V
–0.3
6
V
–0.3
6
V
–0.3
35
V
–2
38
V
–0.3
6
V
8
V
8
W
–40
150
°C
–55
150
°C
(1) Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to Absolute Maximum rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD)
Electrostatic discharge
Human body model (HBM)⁽¹⁾
Charged device model (CDM)⁽²⁾
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
T_A = 25° (unless otherwise noted)
V_DD
V_IN
I_SW
I_SW-PK
ƒ_SW
Gate drive voltage
Input supply voltage⁽¹⁾
Continuous V_SW current
Peak V_SW current⁽³⁾
Switching frequency
On time duty cycle
Minimum PWM on time
Operating temperature
V_IN = 10 V, V_DD = 5 V, Duty cycle = 50%,
ƒ_SW = 130 kHz, L_SW = 6 µH⁽²⁾
C_BOOT = 0.1 µF (min)
MIN
MAX UNIT
4.5
5.5 V
24 V
10 A
15 A
600 kHz
85%
40
ns
–40
125 °C
(1) Operating at high V_IN can create excessive AC voltage overshoots on the switch node (V_SW) during MOSFET switching transients. For
reliable operation, the switch node (V_SW) to ground voltage must remain at or below the Absolute Maximum Ratings.
(2) Measurement made with six 10 µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across V_IN to P_GND pins.
(3) System conditions as defined in Note 2. Peak V_SW Current is applied for t_p = 10 ms, duty cycle ≤ 1%
6.4 Thermal Information
T_A = 25°C (unless otherwise noted)
THERMAL METRIC
R_θJC
R_θJB
Junction-to-case (top of package) thermal resistance⁽¹⁾
Junction-to-board thermal resistance⁽²⁾
MIN TYP MAX UNIT
22.8
°C/W
2.5
(1) R_θJC is determined with the device mounted on a 1 inch² (6.45 cm²), 2 oz (0.071 mm thick) Cu pad on a 1.5 inch x 1.5 inch, 0.06 inch
(1.52 mm) thick FR4 board.
(2) R_θJB value based on hottest board temperature within 1mm of the package.
4
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