BQ500101 Datasheet, PDF (3/20 Pages) Texas Instruments – NexFET Power Stage

www.ti.com
5 Pin Configuration and Functions
SON 3.5 × 4.5 mm
(Top View)
bq500101
SLPS585 – MARCH 2016
PIN
NO. NAME
1 V_DD
2 V_DD
3 P_GND
4 V_SW
5 V_IN
6 BOOT_R
7 BOOT
8 PWM
9 P_GND
Pin Functions
DESCRIPTION
Supply voltage to gate drivers and internal circuitry.
Supply voltage to gate drivers and internal circuitry.
Power ground, needs to be connected to Pin 9 and PCB
Voltage switching node – pin connection to the inductor.
Input voltage pin. Connect input capacitors close to this pin.
Bootstrap capacitor C_BOOT connections. Connect a minimum 0.1 µF 16 V X5R, ceramic cap C_BOOT from BOOT to
BOOT_R pins. The bootstrap capacitor provides the charge to turn on the Control FET. The bootstrap diode is
integrated. Boot_R is internally connected to V_SW.
Pulse Width modulated tri-state input from external controller. Logic Low sets Control FET gate low and Sync FET
gate high. Logic High sets Control FET gate high and Sync FET gate Low. Open or High Z sets both MOSFET gates
low if greater than the tri-state shutdown hold-off time (t_3HT)
Power ground
Copyright © 2016, Texas Instruments Incorporated
Submit Documentation Feedback
3