OMAP4430 Datasheet, PDF (352/443 Pages) Texas Instruments – Multimedia Device

OMAP4430
Public Version
SWPS041D – DECEMBER 2010 – REVISED JANUARY 2012
1-WIRE
t_RTSL
t_PDH
t_RSTH
t_PDL
Figure 6-106. 1-Wire—Break (Reset)
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SWPS040-068
1-WIRE
t_LOWR
t_RDV
t_SLOT
t_REL
Figure 6-107. 1-Wire—Read Bit (Data)
t_REC
SWPS040-069
1-WIRE
t_LOW1
t_SLOT
t_REC
SWPS040-070
Figure 6-108. 1-Wire—Write Bit-One Timing (Command / Address or Data)
1-WIRE
t_SLOT
t_LOW0
t_REC
SWPS040-071
Figure 6-109. 1-Wire—Write Bit-Zero Timing (Command / Address or Data)
6.6.11 Universal Asynchronous Receiver Transmitter (UART)
PCB conditions:
NOTE
• Far End Load is less than 5 pF: for more information on the UART IO Settings, see
Table 6-182.
• Maximum trace length is less than 10 cm.
• Characteristic impedance is between 20 Ω to 70 Ω.
352 Timing Requirements and Switching Characteristics
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