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TLC5951 Datasheet, PDF (32/46 Pages) Texas Instruments – 24-Channel, 12-Bit PWM LED Driver with 7-Bit Dot Correction and 3-Group, 8-Bit Global Brightness Control
TLC5951
SBVS127B – MARCH 2009 – REVISED DECEMBER 2009
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User-Defined Data Latch
The user-defined (UD) data latch is 17 bits in length and is not used for any device functionality. However, these
data can be used for communication between a controller connected to DCSIN and another controller connected
to GSSIN. When the IC is powered on, the data in the UD latch are not set to a specific default value.
BITS
215-199
Table 13. Data Bit Assignment
USER-DEFINED DATA BITS
16-0
STATUS INFORMATION DATA (SID)
Status information data (SID) are 288 bits in length and are read-only data. SID consists of the LED open
detection (LOD) error, LED short detection (LSD), thermal error flag (TEF), and the data in the DC/BC/FC/UD
data latch. The SID are shifted out onto GSSOUT with the GSSCK rising edge after GSLAT is input for a GS
data write. These SID are loaded into the 288-bit common shift register after data in the 288-bit common shift
register are copied to the data latch.
LOD/LSD Data Latch (48 Bits)
LOD
LOD
¼ Data of
Data of
OUTB7
OUTR0
LSD
LSD
¼ Data of
Data of
OUTB7
OUTR0
TEF
216-Bit DC/BC/FC/UD Data Latch
MSB
LSB
User Function BC Data
BC Data BC Data
BC Data
Defined Control
¼ of
of
¼ of
of
Bits 16-0 Bits 6-0 OUTBn
OUTRn OUTB7
OUTR0
17
7
GSSOUT
(Reserved Data)
Common
Common Common
Common Common
¼ ¼ Data Bit
Data Bit Data Bit
Data Bit Data Bit
287
264
263
240
239
MSB
Common
Data Bit
238-216
Common Common Common
Common Common
Common
¼ ¼ Data Bit Data Bit Data Bit
Data Bit Data Bit
Data Bit
215-199 198-192 191
168
167
0
LSB
288-Bit Common Shift Register
Figure 47. DC/BC/FC Data Load Assignment
GSSIN
GSSCK
32
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