TLC5951 Datasheet, PDF (13/46 Pages) Texas Instruments – 24-Channel, 12-Bit PWM LED Driver with 7-Bit Dot Correction and 3-Group, 8-Bit Global Brightness Control

TLC5951
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TIMING DIAGRAMS (continued)
SBVS127B – MARCH 2009 – REVISED DECEMBER 2009
GSSIN
GSSCK
GSLAT
XBLNK
GSCKR
(GSCKG)
(GSCKB)
Grayscale Data Latch
(Internal)
Dot Correction/
Brightness Control Function
Control Data Latch (Internal)
Common Shift Register
Bit 0 (Internal)
Common Shift Register
Bit 1 (Internal)
GSR0
0A
T_SU0
GSB7
11B
GSB7 GSB7
10B 9B
T_H0
GSB7
8B
GSB7
7B
GSR0
3B
f_CLK (SCLK)
GSR0
2B
GSR0 GSR0
1B
0B
T_WH0
GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7
11C 10C 9C
8C
7C
6C
5C
4C
3C
T_SU2
12345
285 286 287 288
T_WL0
T_H1 T_WH1
1234 567
T_SU3, T_SU4
Shift Register Data Are Transferred to GS Data Latch
T_SU1
f_CLK (GSCKR/G/B)
T_WL2
Previous Data
Latest Data
GSB7 GSB7 GSB7 GSB7 GSB7
11B 10B 9B
8B
7B
DCR0 GSB7 GSB7 GSB7 GSB7
Bit 0 11B 10B
9B
8B
GSR0 GSR0 GSR0 GSR0 DCR0
3B
2B
1B
0B
Bit 0
GSR0 GSR0 GSR0 GSR0 DCR0
4B
3B
2B
1B
Bit 1
GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7
11C 10C 9C
8C
7C
9C
8C
7C
DCR0 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7 GSB7
0B 11C 10C 9C
8C
7C
9C
8C
Common Shift Register
Bit 286 (Internal)
GSSOUT
OUTR0, OUTR4 ^OFF
(OUTG0, OUTG4) _ON
(OUTB0, OUTB4)
OUTR1, OUTR5 ^OFF
(OUTG1, OUTG5) _ON
(OUTB1, OUTB5)
OUTR2, OUTR6 ^OFF
(OUTG2, OUTG6) _ON
(OUTB2, OUTB6)
OUTR3, OUTR7 ^OFF
(OUTG3, OUTG7) _ON
(OUTB3, OUTB7)
LOD LOD
B6A B5A
t_D0
LOD LOD
B7A B6A
(V_OUTRnH)
LOD LOD
B4A B3A
LOD LOD
B5A B4A
t_R0/t_F0
LOD
B2A
LOD
B3A
DCR0 DCR0 GSR0 GSR0 LOD
1A
0A
11B 10B B6B
DCR0 DCR0 DCR0 DCR0 GSB7 LOD
3A
2A
1A
0A
11B B7B
SID Data Are Transferred to
288-Bit Common Shift Register
(V_OUTRnL)
LOD LOD LOD LOD LOD LOD LOD LOD
B5B B4B B3B B2B B1B B0B G7B G6B
LOD LOD LOD LOD LOD LOD LOD LOD
B6B B5B B4B B3B B2B B1B B0B G7B
t_D2
ON
t_D3
t_F1
ON
t_D4
t_R1
ON
t_D5
Figure 10. Grayscale Data Write Timing
ON
t_D6
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