LMH2832 Datasheet, PDF (32/46 Pages) Texas Instruments – LMH2832 Fully Differential, Dual, 1.1-GHz, Digital Variable-Gain Amplifier

LMH2832
SBOS709A – JULY 2016 – REVISED JULY 2016
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Application Information (continued)
10.1.1.4 ADC Input Common-Mode Voltage Considerations (DC-Coupled Input)
The LMH2832 is designed to primarily be used in ac-coupled applications only. However, the LMH2832 can be
dc-coupled if certain strict conditions are met. The LMH2832 has an internal common-mode bias equal to the
mid-supply voltage, so any dc coupling on the input or output must have a common-mode voltage that is also set
to mid-supply. To dc couple to an ADC input, the mid-supply voltage of the LMH2832 must be centered around
the ADC input common-mode. This common-mode matching can be accomplished by shifting the supplies to
center the mid-supply voltage around the ADC input common-mode voltage. However, shifting the supplies also
changes the ground reference for the digital inputs, which then likely requires a voltage-shifted interface as well.
The LMH2832 is not recommended to be operated as dc-coupled unless absolutely necessary.
10.2 Typical Applications
10.2.1 DOCSIS 3.X Driver
The LMH2832 is designed to perform best when driving differential input ADCs in high-speed applications.
Figure 61 shows an example diagram of the LMH2832 driving an ADC with a fifth-order, low-pass filter for a 75-Ω
impedance, data over cable service interface specification (DOCSIS) 3.X upstream receiver return path
application. The primary interface between the amplifier and the ADC is usually an antialiasing filter to suppress
high-frequency harmonics that otherwise alias back into the ADC FFT spectrum. Filters range from single-order
real RC poles to higher-order, resistor-inductor-capacitor (RLC) filters, depending on the application
requirements. Series output resistors (R_O) help isolate the amplifier from any capacitive load presented by the
filter, and can also be used to create a matched impedance to drive transmission lines.
VS+ = 5V
ZS = 75-Ÿ _{1:2 O}
0.1 µF
INPx
10
64.9 ^{0.1 µF}
24 nH
82 nH
24 nH
5.1
OUTPx
½ LMH2832
+
- ^OUT_AMP
OUTMx
100
5.5 pF
5.5 pF
100
0.1 µF ^INMx
10
64.9 _{0.1 µF}
24 nH
82 nH
24 nH
5.1
½ ADS54J40
VOCM
SPI
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 61. DOCSIS 3.X Driver with the ADS54J40 and a 300-MHz, 4th-Order, Butterworth, Low-Pass Filter
10.2.1.1 Design Requirements
Table 12 shows example design requirements for the LMH2832 in an upstream receiver application.
Table 12. Example Design Requirements
SPECIFICATION
Supply voltage
Usable input frequency range
System voltage gain and range
Source impedance
Signal path SNR at 175 MHz (measured at ADC)
DESIGN REQUIREMENTS
4.75 to 5.25 V
300 MHz
33-dB voltage gain with 30-dB range
75 Ω, single-ended
> 50 dBFS
32
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