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LMH2832 Datasheet, PDF (31/46 Pages) Texas Instruments – LMH2832 Fully Differential, Dual, 1.1-GHz, Digital Variable-Gain Amplifier
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LMH2832
SBOS709A – JULY 2016 – REVISED JULY 2016
Application Information (continued)
This worst-case spur calculation assumes that the amplifier and filter spur of interest is in phase with the
corresponding spur in the ADC, such that the two spur amplitudes can be added linearly. There are two phase-
shift mechanisms that cause the measured distortion performance of the amplifier-ADC chain to deviate from the
expected performance calculated using Equation 5; one mechanism is the common-mode phase shift and the
other is the differential phase shift.
Common-mode phase shift is the phase shift detected equally in both branches of the differential signal path
including the filter. Common-mode phase shift nullifies the basic assumption that the amplifier, filter, and ADC
spur sources are in phase. This phase shift can lead to better performance than predicted when the spurs
become phase shifted, and there is the potential for cancellation when the phase shift reaches 180°. However,
there is a significant challenge in designing an amplifier-ADC interface circuit to take advantage of a common-
mode phase shift for cancellation: the phase characteristics of the ADC spur sources are unknown, thus the
necessary phase shift in the filter and signal path for cancellation is also unknown.
Differential phase shift is the difference in the phase response between the two branches of the differential filter
signal path. Differential phase shift in the filter is a result of mismatched components caused by nominal
tolerances and can severely degrade the even harmonic distortion of the amplifier-ADC chain. This effect has the
same result as mismatched path lengths for the two differential traces, and causes more phase shift in one path
than the other. Ideally, the phase responses over frequency through the two sides of a differential signal path are
identical, such that even harmonics remain optimally out of phase and cancel when the signal is taken
differentially. However, if one side has more phase shift than the other, then the even harmonic cancellation is
not as effective.
Single-order, resistor-capacitor (RC) filters cause very little differential phase shift with nominal tolerances of 5%
or less, but higher-order, inductor-capacitor (LC) filters are very sensitive to component mismatch. For instance,
a third-order Butterworth band-pass filter with a 100-MHz center frequency and a 20-MHz bandwidth displays as
much as 20° of differential phase imbalance in a SPICE Monte Carlo analysis with 2% component tolerances.
Therefore, although a prototype may work, production variance is unacceptable. For ac-coupled or dc-coupled
applications where a transformer or balun cannot be used, using first- or second-order filters is recommended to
minimize the effect of differential phase shift.
10.1.1.3 ADC Input Common-Mode Voltage Considerations (AC-Coupled Input)
When interfacing to an ADC, the input common-mode voltage range of the ADC must be taken into account for
proper operation. In an ac-coupled application between the amplifier and the ADC, the input common-mode
voltage bias of the ADC can be accomplished in different ways. Some ADCs use internal bias networks such that
the analog inputs are automatically biased to the required input common-mode voltage if the inputs are ac-
coupled with capacitors (or if the filter between the amplifier and ADC is a band-pass filter). Other ADCs supply
the required input common-mode voltage from a reference voltage output pin (often termed CM or VCM). With
these ADCs, the ac-coupled input signal can be re-biased to the input common-mode voltage by connecting
resistors from each input to the CM output of the ADC, as shown in Figure 60. AC coupling provides dc common-
mode isolation between the amplifier and the ADC; thus, the output common-mode voltage of the amplifier is a
don’t care for the ADC.
RO
Amp
RO
RCM
RCM
AIN+
AIN-
ADC
CM
Figure 60. Biasing AC-Coupled ADC Inputs Using the ADC CM Output
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