LMH2832 Datasheet, PDF (25/46 Pages) Texas Instruments – LMH2832 Fully Differential, Dual, 1.1-GHz, Digital Variable-Gain Amplifier

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LMH2832
SBOS709A – JULY 2016 – REVISED JULY 2016
9.6.1 Register Descriptions
Exercising the SW reset function returns all registers to the default values of the respective channel.
9.6.1.1 SW Reset Register (address = 2)
Figure 53. SW Reset Register
7
6
5
4
3
2
1
Reserved
Reset B
Reserved
R-0h
R/W-0h
R-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4. SW Reset Register Field Descriptions
Bit Field
7-5 Reserved
4
Reset B
3-1 Reserved
0
Reset A
Type
R
R/W
Reset
0h
0h
R
0h
R/W
0h
Description
Reserved.
This bit is a self-clearing bit.
0 = No action
1 = Reset
Reserved.
This bit is a self-clearing bit.
0 = No action
1 = Reset
0
Reset A
R/W-0h
9.6.2 Power-Down Control Register (address = 3)
Figure 54. Power-Down Control Register
7
6
5
4
3
2
1
Reserved
PD B
Reserved
R-0h
R/W-0h
R-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
0
PD A
R/W-0h
Bit Field
7-5 Reserved
4
PD B
3-1 Reserved
0
PD A
Table 5. Power-Down Control Register Field Descriptions
Type
R
R/W
R
R/W
Reset
0h
0h
0h
0h
Description
Reserved.
0 = Active
1 = PD
Reserved.
0 = Active
1 = PD
9.6.3 Channel A RW0 Register (address = 4)
Figure 55. Channel A RW0 Register
7
6
5
4
3
2
1
0
Channel A RW0
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
7-0 Channel A RW0
Table 6. Channel A RW0 Register Field Descriptions
Type
R/W
Reset
0h
Description
These bits drive the output CHA_RW0[7:0] and are reset by a
device reset or Reset A. Table 10 lists controls for this register.
Copyright © 2016, Texas Instruments Incorporated
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