DAC8550_16 Datasheet, PDF (3/31 Pages) Texas Instruments – 16-bit, Ultra-Low Glitch, Voltage Output Digital-To-Analog Converter

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5 Pin Configuration and Functions
DAC8550
SLAS476F – MARCH 2006 – REVISED MARCH 2016
DGK Package
8-Pin VSSOP
Top View
V_{DD 1}
V_{REF 2}
V_{FB 3}
V_{OUT 4}
DAC8550
8 ^GND
7 ^DIN
6 ^SCLK
5 ^SYNC
PIN
NAME
NO.
V_DD
1
V_REF
2
V_FB
3
V_OUT
4
SYNC
5
SCLK
6
D_IN
7
GND
8
Pin Functions
TYPE
DESCRIPTION
PWR
I
I
O
I
I
I
GND
Power-supply input
Reference voltage input
Feedback connection for the output amplifier
Analog output voltage from DAC. The output amplifier has rail-to-rail operation.
Level-triggered control input (active LOW). This is the frame synchronization signal for the input data.
When SYNC goes LOW, it enables the input shift register and data is transferred in on the falling edges
of the following clocks. The DAC is updated following the 24th clock (unless SYNC is taken HIGH before
this edge, in which case the rising edge of SYNC acts as an interrupt and the write sequence is ignored
by the DAC8550). Schmitt-Trigger logic input.
Serial clock input. Data can be transferred at rates up to 30 MHz Schmitt-Trigger logic input.
Serial data input. Data is clocked into the 24-bit input shift register on each falling edge of the serial clock
input. Schmitt-Trigger logic input.
Ground reference point for all circuitry on the part
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