DAC8550_16 Datasheet, PDF (22/31 Pages) Texas Instruments – 16-bit, Ultra-Low Glitch, Voltage Output Digital-To-Analog Converter

DAC8550
SLAS476F – MARCH 2006 – REVISED MARCH 2016
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8.3 System Examples
8.3.1 Microprocessor Interfacing
8.3.1.1 DAC8550 to 8051 Interface
See Figure 56 for a serial interface between the DAC8550 and a typical 8051-type microcontroller. The setup for
the interface is as follows: TXD of the 8051 drives SCLK of the DAC8550, while RXD drives the serial data line of
the device. The SYNC signal is derived from a bit-programmable pin on the port of the 8051. In this case, port
line P3.3 is used. When data are to be transmitted to the DAC8550, P3.3 is taken LOW. The 8051 transmits data
in 8-bit bytes; thus, only eight falling clock edges occur in the transmit cycle. To load data to the DAC, P3.3 is left
LOW after the first eight bits are transmitted, then a second write cycle is initiated to transmit the second byte of
data. P3.3 is taken HIGH following the completion of the third write cycle. The 8051 outputs the serial data in a
format that has the LSB first. The DAC8550 requires its data with the MSB as the first bit received. The 8051
transmit routine must therefore take this into account, and mirror the data as needed.
80C51/80L51⁽¹⁾
P3.3
TXD
RXD
DAC8550⁽¹⁾
SYNC
SCLK
D_IN
NOTE: (1) Additional pins omitted for clarity.
Figure 56. DAC8550 to 80C51 or 80L51 Interface
8.3.1.2 DAC8550 to Microwire Interface
Figure 57 shows an interface between the DAC8550 and any Microwire-compatible device. Serial data are
shifted out on the falling edge of the serial clock and clocked into the DAC8550 on the rising edge of the SK
signal.
Microwire^TM
CS
SK
SO
DAC8550⁽¹⁾
SYNC
SCLK
D_IN
NOTE: (1) Additional pins omitted for clarity.
Figure 57. DAC8550 to Microwire Interface
8.3.1.3 DAC8550 to 68HC11 Interface
Figure 58 shows a serial interface between the DAC8550 and the 68HC11 microcontroller. SCK of the 68HC11
drives the SCLK of the DAC8550, while the MOSI output drives the serial data line of the DAC. The SYNC signal
is derived from a port line (PC7), similar to the 8051 diagram.
68HC11⁽¹⁾
PC7
SCK
MOSI
DAC8550⁽¹⁾
SYNC
SCLK
D_IN
NOTE: (1) Additional pins omitted for clarity.
Figure 58. DAC8550 to 68HC11 Interface
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