THS1041_15 Datasheet, PDF (27/42 Pages) Texas Instruments – 10-Bit, 40-MSPS ANALOG-TO-DIGITAL CONVERTER WITH PGA AND CLAMP

THS1041
SLAS289C − OCTOBER 2001 − REVISED OCTOBER 2004
PRINCIPLES OF OPERATION
digital control registers
The THS1041 contains two clamp registers and a control register for user programming of THS1041 operation.
Binary data can be written into these registers by using pins I/O0 to I/O9 and the WR and OE pins (see the
previous section). In input mode, the two I/O bus MSBs are address bits, 00 addressing clamp register 1, 01
clamp register 2, and 10 the control register. The clamp registers and control registers are write only registers,
and stored values cannot be read on the I/O data bus.
ADDRESS
I/O[9:8]
DESCRIPTION
00
Clamp register 1
01
Clamp register 2
10
Control register
11†
Reserved†
† _{Do not write to register 11}
DEF
(HEX)
00
00
01
Table 2. Register Map
BIT
W
B7
B6
B5
B4
B3
B2
B1
B0
W DAC[7] DAC[6] DAC[5] DAC[4] DAC[3] DAC[2] DAC[1] DAC[0]
W
DAC[9] DAC[8]
W
CLDIS TWOC CLINT PDWN PGA[2] PGA[1] PGA[0]
REGISTER
Control register
I/O[9:8] = 10
Clamp register 1
I/O[9:8] = 00
Clamp register 2
I/O[9:8] = 01
Table 3. Register Contents
BIT NO BIT NAME(S)
2:0
PGA[2:0]
3
PDWN
4
CLINT
5
TWOC
6
CLDIS
7
7:0
DAC[7:0]
7:2
1:0
DAC[9:8]
DEFAULT
001
0
0
0
0
0
0
DESCRIPTION
PGA gain:
000 = 0.5
001 = 1.0 (default value)
010 = 1.5
011 = 2.0
100 = 2.5
101 = 3.0
110 = 3.5
111 = 4.0
Power down
0 = THS1041 powered up
1 = THS1041 powered down
Clamp voltage internal/external
0 = external analog clamp voltage from CLAMPIN pin
1 = from onboard DAC (see clamp register)
Output format
0 = unsigned binary
1 = twos complement
CLAMPOUT pin disable (for power saving)
0 = Enable
1 = Disable
Unused
Clamp DAC voltage
(DAC[0] = LSB.)
DAC[9:0] = 00h: Clamp voltage = REFB
DAC[9:0] = 3Fh: Clamp voltage = REFT
Unused
Clamp DAC voltage
(DAC[9] = MSB)
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