TMS320DM6467CCUTA Datasheet, PDF (268/355 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467
SPRS403H – DECEMBER 2007 – REVISED JUNE 2012
HCS
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HAS^(D)
1
HCNTL[1:0]
1
HR/W
1
HHWIL
HSTROBE^(A)(C)
HD[15:0]
(input)
HRDY^(B)
2
2
2
3
1
2
1
2
1
2
4
3
11
12
1st Half-Word
11
12
2nd Half-Word
5
13
13
5
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and the
state of the FIFO, transitions on HRDY may or may not occur.
For more detailed information on the HPI peripheral, see the TMS320DM646x DMSoC Host Port Interface (HPI) User’s Guide (literature
number SPRUES1).
C. HCS reflects typical HCS behavior when HSTROBE assertion is caused by HDS1 or HDS2. HCS timing requirements are reflected by
parameters for HSTROBE.
D. For proper HPI operation, HAS must be pulled up via an external resistor.
Figure 7-60. HPI16 Write Timing (HAS Not Used, Tied High)
268 Peripheral Information and Electrical Specifications
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