TMS320DM6467CCUTA Datasheet, PDF (239/355 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467
www.ti.com
SPRS403H – DECEMBER 2007 – REVISED JUNE 2012
7.13 Clock Recovery Generator (CRGEN)
Each TSIF module has an associated CRGEN module which can adjust the local system time clock based
upon the received Program Clock Reference (PCR) packets. CRGEN0 may only be used with TSIF 0 and
CRGEN 1 may only be used with TSIF 1.
Each CRGEN module features:
• Automatic load of received PCR packet values from associated TSIF module
• Local System Time Clock (STC) counter
• PCR/STC difference generator (subtractor)
• Loop Filter (LPF)
• 1-bit sigma/delta modulator digital-to-analog converter (DAC) output for external VCXO control
7.13.1 CRGEN Peripheral Register Description(s)
The CRGEN0 and CRGEN1 registers are shown in Table 7-55 and Table 7-56, respectively.
HEX ADDRESS RANGE
0x01C2 6000
0x01C2 6004
0x01C2 6008
0x01C2 600C
0x01C2 6010
0x01C2 6014
0x01C2 6018
0x01C2 601C
0x01C2 6020
0x01C2 6024
0x01C2 6028
0x01C2 602C
0x01C2 6030 - 0x01C2 603F
0x01C2 6040
0x01C2 6044
0x01C2 6048
0x01C2 604C
0x01C2 6050
0x01C2 6054
0x01C2 6058 - 0x01C2 607F
Table 7-55. CRGEN0 Registers
ACRONYM
PID
CONTROL
STC_HI
STC_LO
STC_VAL_HI
STC_VAL_LO
PCR_HI
PCR_LO
PCR_PKT_STAT
LOOP_FILTER
STC_OFFSET_HI
STC_OFFSET_LO
-
INTEN
INTEN_SET
INTEN_CLR
INTSTAT
INTSTAT_CLR
EMU_CTRL
-
REGISTER NAME
CRGEN Peripheral Identification Register
CRGEN control register
System Time Clock (STC) current value (upper 17 bits)
STC current value (lower 16 bits plus extension)
STC value (upper 17 bits) on TSIF0 PCR packet detection
STC value (lower 16 bits plus extension) on TSIF0 PCR packet
detection
Program Clock Reference (PCR) value (upper 17 bits) from
TSIF0 Receive packet
PCR value (lower 16 bits plus extension) from TSIF0 Receive
packet
PCR packet status
Loop filter (LPF) interface
Offset value of the STC counter for the higher (upper) 17 bits.
This value is detected in the STC counter with the first PCR
loading pulse signal.
Offset value of the STC counter for the lower 16 bits. The role
of this register is same as the STC_LO register 0x01C2 600C.
Reserved
Interrupt enable
Interrupt enable set
Interrupt enable clear
Interrupt status
Interrupt status clear
Emulation control
Reserved
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Peripheral Information and Electrical Specifications 239
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