English
Language : 

OMAPL138B-EP Datasheet, PDF (263/282 Pages) Texas Instruments – OMAPL138B C6-Integra DSP+ARM Processor
OMAPL138B-EP
www.ti.com
SPRS815B – DECEMBER 2011 – REVISED MARCH 2012
5.32.2 GPIO Peripheral Input/Output Electrical Data/Timing
Table 5-137. Timing Requirements for GPIO Inputs(1)(2) (see Figure 5-87)
NO.
PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
MIN
MAX
UNIT
1 tw(GPIH)
2 tw(GPIL)
Pulse duration, GPn[m] as input high
Pulse duration, GPn[m] as input low
2C (2) (3)
ns
2C (2) (3)
ns
(1) Parameters are characterized from -40°C to 105°C unless otherwise noted.
(2) The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the device
recognize the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to allow the device
enough time to access the GPIO register through the internal bus.
(3) C=SYSCLK4 period in ns.
Table 5-138. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs(1)
(see Figure 5-87)
NO.
PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
MIN
MAX
UNIT
3 tw(GPOH) Pulse duration, GPn[m] as output high
4 tw(GPOL) Pulse duration, GPn[m] as output low
2C (2) (3)
ns
2C (2) (3)
ns
(1) Parameters are characterized from -40°C to 105°C unless otherwise noted.
(2) This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
(3) C=SYSCLK4 period in ns.
GPn[m]
as input
GPn[m]
as output
2
1
4
3
Figure 5-87. GPIO Port Timing
5.32.3 GPIO Peripheral External Interrupts Electrical Data/Timing
Table 5-139. Timing Requirements for External Interrupts(1)(2) (see Figure 5-88)
NO.
PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
MIN
MAX
UNIT
1 tw(ILOW) Width of the external interrupt pulse low
2 tw(IHIGH) Width of the external interrupt pulse high
2C (2) (3)
ns
2C (2) (3)
ns
(1) Parameters are characterized from -40°C to 105°C unless otherwise noted.
(2) The pulse width given is sufficient to generate an interrupt or an EDMA event. However, if a user wants to have the device recognize the
GPIO changes through software polling of the GPIO register, the GPIO duration must be extended to allow the device enough time to
access the GPIO register through the internal bus.
(3) C=SYSCLK4 period in ns.
GPn[m]
as input
2
1
Figure 5-88. GPIO External Interrupt Timing
Copyright © 2011–2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 263
Submit Documentation Feedback
Product Folder Link(s): OMAPL138B-EP