OMAPL138B-EP Datasheet, PDF (209/282 Pages) Texas Instruments – OMAPL138B C6-Integra DSP+ARM Processor

OMAPL138B-EP
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SPRS815B – DECEMBER 2011 – REVISED MARCH 2012
Table 5-102. Timing Requirements for EMAC MII Receive 10/100 Mbit/s⁽¹⁾⁽²⁾ (see Figure 5-50)
NO.
PARAMETER
1 t_{su(MRXD-MII_RXCLKH)} Setup time, receive selected signals valid before MII_RXCLK high
2 t_{h(MII_RXCLKH-MRXD)} Hold time, receive selected signals valid after MII_RXCLK high
(1) Parameters are characterized from -40°C to 105°C unless otherwise noted.
(2) Receive selected signals include: MII_RXD[3]-MII_RXD[0], MII_RXDV, and MII_RXER.
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN
MAX
8
ns
8
ns
1
2
MII_RXCLK (Input)
MII_RXD[3]-MII_RXD[0],
MII_RXDV, MII_RXER (Inputs)
Figure 5-50. EMAC Receive Interface Timing
Table 5-103. Switching Characteristics Over Recommended Operating Conditions for EMAC MII Transmit
10/100 Mbit/s⁽¹⁾⁽²⁾ (see Figure 5-51)
NO.
PARAMETER
1 ^{td(MII_TXCLKH-}
MTXD)
Delay time, MII_TXCLK high to transmit selected signals valid
(1) Parameters are characterized from -40°C to 105°C unless otherwise noted.
(2) Transmit selected signals include: MTXD3-MTXD0, and MII_TXEN.
1.3V, 1.2V,
1.1V
MIN MAX
1.0V
UNIT
MIN MAX
2
25
2
32 ns
1
MII_TCLK (Input)
MII_TXD[3]-MII_TXD[0],
MII_TXEN (Outputs)
Figure 5-51. EMAC Transmit Interface Timing
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Peripheral Information and Electrical Specifications 209
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