OMAPL138B-EP Datasheet, PDF (136/282 Pages) Texas Instruments – OMAPL138B C6-Integra DSP+ARM Processor

OMAPL138B-EP
SPRS815B – DECEMBER 2011 – REVISED MARCH 2012
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5.11.3.10 VREF Routing
VREF is used as a reference by the input buffers of the DDR2/mDDR memories as well as the
OMAPL138. VREF is intended to be half the DDR2/mDDR power supply voltage and should be created
using a resistive divider as shown in Figure 5-19. Other methods of creating VREF are not recommended.
Figure 5-23 shows the layout guidelines for VREF.
VREF Bypass Capacitor
DDR2/mDDR Device
A1
VREF Nominal Minimum
Trace Width is 20 Mils
DDR2/mDDR
A1
Neck down to minimum in BGA escape
regions is acceptable. Narrowing to
accomodate via congestion for short
distances is also acceptable. Best
performance is obtained if the width
of VREF is maximized.
Figure 5-23. VREF Routing and Topology
136 Peripheral Information and Electrical Specifications
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