DAC38RF82_17 Datasheet, PDF (24/140 Pages) Texas Instruments – Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation

DAC38RF82, DAC38RF89
SLASEA6B – FEBRUARY 2017 – REVISED AUGUST 2017
Functional Block Diagrams (continued)
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DACCLK+
DACCLK-
DACCLKSE
SYSREF+
SYSREF-
RX[4..7]+
RX[4..7]-
SYNC2\+
SYNC2\-
VDDT1
VDDR18
RX[0..3]+
RX[0..3]-
SYNC1\+
SYNC1\-
VDDS18
AMUX0/1
IFORCE
VSENSE
Low Jitter
PLL
Clock
Distribution
Divider
/2, /3, /4
CLKTX+
CLKTX-
VDDTX1
VDDTX18
x
8
sin(x)
Control Interface
DACA
Gain
14-b
DAC
100:
VOUT1+
VOUT1-
Temp
Sensor
0.9 V
Ref
JTAG
EXTIO
RBIAS
TESTMODE
VEE18N
VDDA18
ATEST
Copyright © 2016, Texas Instruments Incorporated
Figure 26. 8-Bit Input Mode Block Diagram
24
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