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TLC320AD91 Datasheet, PDF (20/43 Pages) Texas Instruments – Stereo Audio Codec
2.3 Software Interface
The register indexes and usage are shown in Table 2–4. All registers not shown are assumed to be reserved.
Table 2–4. TLC320AD91C Register Definitions
INDEX NAME
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6
D5 D4 D3 D2 D1 D0 DEFAULT
00h Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
Play Master
02h Volume
Mute 0 ML5‡ ML4 ML3 ML2 ML1 ML0 0
Stereo
0 MR5‡ MR4 MR3 MR2 MR1 MR0 8000h
04h†
Headphone
Volume
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
Play Master
06h Volume
Mute 0
0
0
0
0
0
0
0
0 MM5‡ MM4 MM3 MM2 MM1 MM0 8000h
Mono
Master
08h† Tone (not
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000h
used)
0Ah
PCBEEP
Volume
Mute 0
0
0
0
0
0
0
0
0
0 PV3 PV2 PV1 PV0 0
8000h
Phone
0Ch Volume
Mute 0
0
0
0
0
0
0
0
0 GN5‡ GN4 GN3 GN2 GN1 GN0 8008h
0Eh Mic Volume Mute 0
0
0
0
0
0
0
0 20dB GN5‡ GN4 GN3 GN2 GN1 GN0 8008h
10h
Line In
Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
12h CD Volume Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
14h
Video
Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
16h
Aux
Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
PCM Out
18h Volume
Mute 0
0 GL4 GL3 GL2 GL1 GL0 0
0
0 GR4 GR3 GR2 GR1 GR0 8808h
† Optional AC‘97 registers whose functionality are not implemented on the TLC320AD91C. These registers can be written to, but reads always return zeroes.
‡ Special function volume settings. If bit is set, then the 5 volume bits implemented are set to all ones.
NOTE: All registers and all bits in all registers must have read back capabilities (be readable) to facilitate testing.