LMH6521_16 Datasheet, PDF (20/29 Pages) Texas Instruments – High Performance Dual DVGA

LMH6521
SNOSB47D – MAY 2011 – REVISED MARCH 2013
www.ti.com
RESET TIMING
UP
t_RW
DN
Figure 39. Pulse Mode Timing
THERMAL MANAGEMENT
The LMH6521 is packaged in a thermally enhanced WQFN package and features an exposed pad that is
connected to the GND pins. It is recommended that the exposed pad be attached directly to a large power supply
ground plane for maximum heat dissipation. The thermal advantage of the WQFN package is fully realized only
when the exposed die attach pad is soldered down to a thermal land on the PCB board with the through vias
planted underneath the thermal land. The thermal land can be connected to any ground plane within the PCB.
However, it is also very important to maintain good high speed layout practices when designing a system board.
The LMH6521EVAL evaluation board implemented an eight metal layer pcb with (a) 4 oz. copper inner ground
planes (b) additonal through vias and (c) maximum bottom layer metal coverage to assist with device heat
dissipation. These pcb design techniques assisted with the heat dissipation of the LMH6521 to optimize distortion
performance. Please refer to the LMH6521EVAL evaluation board application note AN–2045 SNOA551 for
suggested layout techniques.
Package information is available on the Texas Instruments web site.
http://www.ti.com/packaging
INTERFACE TO ADC
The LMH6521 was designed to be used with TI's high speed ADC's. As shown in Figure 26, AC coupling
provides the best flexibility especially for IF sub-sampling applications.
The inputs of the LMH6521 will self bias to the optimum voltage for normal operation. The internal bias voltage
for the inputs is approximately mid rail which is 2.5V with the typical 5V power supply condition. In most
applications the LMH6521 input will need to be AC coupled.
The LMH6521 output common mode voltage is biased to 0V and has a maximum differential output voltage
swing of 10V_PPD as shown in Figure 40. This means that for driving most ADCs AC coupling is required. Since
most often a band pass filter is desired between the amplifier and ADC the bandpass filter can be configured to
block the DC voltage of the amplifier output from the ADC input. Figure 41 shows a wideband bandpass filter
configuration that could be designed for a 200Ω impedance system for various IF frequencies.
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